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<title>u-boot.git/board, branch v2013.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>arm: at91sam9n12: change EBI IO to high drive mode</title>
<updated>2013-07-22T12:20:14+00:00</updated>
<author>
<name>Bo Shen</name>
<email>voice.shen@atmel.com</email>
</author>
<published>2013-07-17T09:14:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b899fa39019c8fecb508f747525dd8c22622e804'/>
<id>b899fa39019c8fecb508f747525dd8c22622e804</id>
<content type='text'>
As both the DDR SDRAM and NAND flash connect to EBI on at91sam9n12
and share the lower 8 bits data line. If use low drive of the data
line, it will cause DDR data access corrupt in lower address, so
change the data line to high drive mode

This will fix the Linux kernel boot issue when use Lower address

Signed-off-by: Bo Shen &lt;voice.shen@atmel.com&gt;
Acked-by: Andreas Bießmann &lt;andreas.devel@googlemail.com&gt;
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<pre>
As both the DDR SDRAM and NAND flash connect to EBI on at91sam9n12
and share the lower 8 bits data line. If use low drive of the data
line, it will cause DDR data access corrupt in lower address, so
change the data line to high drive mode

This will fix the Linux kernel boot issue when use Lower address

Signed-off-by: Bo Shen &lt;voice.shen@atmel.com&gt;
Acked-by: Andreas Bießmann &lt;andreas.devel@googlemail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ddr cfg: DRAM_RESET needs 0x00020030</title>
<updated>2013-07-20T16:14:09+00:00</updated>
<author>
<name>Troy Kisky</name>
<email>troy.kisky@boundarydevices.com</email>
</author>
<published>2013-07-17T19:46:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fdf86c202c17adfc6f6313dc35f685b1d22b8125'/>
<id>fdf86c202c17adfc6f6313dc35f685b1d22b8125</id>
<content type='text'>
The old value of 0x000e0030 will cause ethernet
timeout issues on the sabrelite and possibly other
boards using the KSZ9021.
I have no explanation as to why.

But this is a correct change, the TRM will be updated
to show that 00b is the only valid setting for bits
19-18 of DRAM_RESET.

My thanks go to Liu Hui(Jason) for this information.

Acked-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Acked-by: Stefano Babic &lt;sbabic@denx.de&gt;
Signed-off-by: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
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<pre>
The old value of 0x000e0030 will cause ethernet
timeout issues on the sabrelite and possibly other
boards using the KSZ9021.
I have no explanation as to why.

But this is a correct change, the TRM will be updated
to show that 00b is the only valid setting for bits
19-18 of DRAM_RESET.

My thanks go to Liu Hui(Jason) for this information.

Acked-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Acked-by: Stefano Babic &lt;sbabic@denx.de&gt;
Signed-off-by: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc85xx: Add gdsys ControlCenter Digital board</title>
<updated>2013-07-16T22:44:30+00:00</updated>
<author>
<name>Dirk Eibach</name>
<email>eibach@gdsys.de</email>
</author>
<published>2013-06-26T13:55:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b9944a77f909e343f930dcbcc597224e65dfcca9'/>
<id>b9944a77f909e343f930dcbcc597224e65dfcca9</id>
<content type='text'>
The gdsys ControlCenter Digital board is based on a Freescale P1022 QorIQ SOC.
It boots from SPI-Flash but can be configured to boot from SD-card for
factory programming and testing.
On board peripherals include:
- 2x GbE
- Lattice ECP3 FPGA connected via PCIe
- mSATA RAID1
- USB host
- DisplayPort video output
- Atmel TPM

Signed-off-by: Dirk Eibach &lt;dirk.eibach@gdsys.cc&gt;
Signed-off-by: Reinhard Pfau &lt;reinhard.pfau@gdsys.cc&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
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<pre>
The gdsys ControlCenter Digital board is based on a Freescale P1022 QorIQ SOC.
It boots from SPI-Flash but can be configured to boot from SD-card for
factory programming and testing.
On board peripherals include:
- 2x GbE
- Lattice ECP3 FPGA connected via PCIe
- mSATA RAID1
- USB host
- DisplayPort video output
- Atmel TPM

Signed-off-by: Dirk Eibach &lt;dirk.eibach@gdsys.cc&gt;
Signed-off-by: Reinhard Pfau &lt;reinhard.pfau@gdsys.cc&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm:samsung:trats:fix: Restore proper orientation of TRATS's LCD panel</title>
<updated>2013-07-16T13:20:16+00:00</updated>
<author>
<name>Łukasz Majewski</name>
<email>l.majewski@samsung.com</email>
</author>
<published>2013-07-15T14:09:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=baa8841d6cc8a8cb79e0aee2fe1b360dacc05aaf'/>
<id>baa8841d6cc8a8cb79e0aee2fe1b360dacc05aaf</id>
<content type='text'>
Before setting: mipi_lcd_device.reverse_panel = 1, the Trats's LCD panel
was flipped by 180 degrees.

The flip was caused by following change:
Exynos: Change get_timer() to work correctly
SHA1: 3d00c0cb96ff93a929700b80d89cb905e5ab5315

This commit fixed udelay(), which is necessary (due to HW LCD controller
oddity) for mipi-dsi correct operation. As a result the display orientation
has been switched.

As a follow up, the hwrevision() function has been removed, since it was
used only in this particular place.

Test HW: Trats Exynos4210 rev 0.

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Cc: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Acked-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
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<pre>
Before setting: mipi_lcd_device.reverse_panel = 1, the Trats's LCD panel
was flipped by 180 degrees.

The flip was caused by following change:
Exynos: Change get_timer() to work correctly
SHA1: 3d00c0cb96ff93a929700b80d89cb905e5ab5315

This commit fixed udelay(), which is necessary (due to HW LCD controller
oddity) for mipi-dsi correct operation. As a result the display orientation
has been switched.

As a follow up, the hwrevision() function has been removed, since it was
used only in this particular place.

Test HW: Trats Exynos4210 rev 0.

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Cc: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Acked-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PPC MPC83xx: Fix MPC8323ERDB build warning</title>
<updated>2013-07-15T22:03:15+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-14T17:42:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f4ea9f86d155aa7845f151c7a37699cdc3e4db2b'/>
<id>f4ea9f86d155aa7845f151c7a37699cdc3e4db2b</id>
<content type='text'>
Fix:

mpc8323erdb.c: In function 'mac_read_from_eeprom':
mpc8323erdb.c:198:3: warning: dereferencing type-punned pointer will
break strict-aliasing rules [-Wstrict-aliasing]

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
cc: Timur Tabi &lt;timur@tabi.org&gt;
cc: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
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<pre>
Fix:

mpc8323erdb.c: In function 'mac_read_from_eeprom':
mpc8323erdb.c:198:3: warning: dereferencing type-punned pointer will
break strict-aliasing rules [-Wstrict-aliasing]

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
cc: Timur Tabi &lt;timur@tabi.org&gt;
cc: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "MIPS: Jz4740: Add qi_lb60 board support"</title>
<updated>2013-07-15T13:19:39+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2013-07-15T13:19:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=54e458de55a8833519225d728e3be1f84b399a38'/>
<id>54e458de55a8833519225d728e3be1f84b399a38</id>
<content type='text'>
The files board/qi/qi_lb60/qi_lb60.c and include/configs/qi_lb60.h were
licensed under the GPL v3 or later, and not v2 or later.  As this is
incompatible with the project, revert this board support until the
responsible parties are available to re-license (if so desired) under
GPL v2.

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
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<pre>
The files board/qi/qi_lb60/qi_lb60.c and include/configs/qi_lb60.h were
licensed under the GPL v3 or later, and not v2 or later.  As this is
incompatible with the project, revert this board support until the
responsible parties are available to re-license (if so desired) under
GPL v2.

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-arm</title>
<updated>2013-07-12T14:36:48+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2013-07-12T14:36:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fbbbc86e8ebac4f42f4ca39ceba80cea27c983bc'/>
<id>fbbbc86e8ebac4f42f4ca39ceba80cea27c983bc</id>
<content type='text'>
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.

Conflicts:
	arch/arm/dts/exynos5250.dtsi

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
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<pre>
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.

Conflicts:
	arch/arm/dts/exynos5250.dtsi

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: tegra: enable LCD panel on Ventana</title>
<updated>2013-07-11T21:15:16+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2013-06-18T15:46:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d035fcf9b6a5a0d7ce8d3d5f3ef960618deea47e'/>
<id>d035fcf9b6a5a0d7ce8d3d5f3ef960618deea47e</id>
<content type='text'>
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
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<pre>
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: tegra: enable LCD panel on Harmony</title>
<updated>2013-07-11T21:15:16+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2013-06-18T15:46:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b46694df845d8e2f654a871c24849cc217d4b5d2'/>
<id>b46694df845d8e2f654a871c24849cc217d4b5d2</id>
<content type='text'>
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
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<pre>
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114</title>
<updated>2013-07-11T21:15:15+00:00</updated>
<author>
<name>Jim Lin</name>
<email>jilin@nvidia.com</email>
</author>
<published>2013-06-21T11:05:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7e44d9320ed4a9994b97eb1c9b2efd04491ff431'/>
<id>7e44d9320ed4a9994b97eb1c9b2efd04491ff431</id>
<content type='text'>
Tegra30 and Tegra114 are compatible except PLL parameters.

Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.

Signed-off-by: Jim Lin &lt;jilin@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
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<pre>
Tegra30 and Tegra114 are compatible except PLL parameters.

Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.

Signed-off-by: Jim Lin &lt;jilin@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
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