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<title>u-boot.git/board, branch v2016.05-rc3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board?h=v2016.05-rc3</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/board?h=v2016.05-rc3'/>
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<updated>2016-04-25T19:10:41Z</updated>
<entry>
<title>ARM: DRA7: Add ABB setup for all domains</title>
<updated>2016-04-25T19:10:41Z</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2016-04-21T19:34:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e52e334e5cb493e19377d23a00aa4d021fc229ba'/>
<id>urn:sha1:e52e334e5cb493e19377d23a00aa4d021fc229ba</id>
<content type='text'>
ABB should be initialized for all required domains voltage domain
for DRA7: IVA, GPU, EVE in addition to the existing MPU domain. If
we do not do this, kernel configuring just the frequency using the
default boot loader configured voltage can fail on many corner lot
units and has been hard to debug. This specifically is a concern with
DRA7 generation of SoCs since other than VDD_MPU, all other domains
are only permitted to setup the voltages to required OPP only at boot.

Reported-by: Richard Woodruff &lt;r-woodruff2@ti.com&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
</entry>
<entry>
<title>ARM: OMAP5/DRA7: Move ABB TXDONE mask to voltage structure</title>
<updated>2016-04-25T19:10:39Z</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2016-04-21T19:34:23Z</published>
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<id>urn:sha1:3708e78c33b3853e300a6ded3113de90dacbc633</id>
<content type='text'>
ABB TX_DONE mask will vary depending on ABB module. For example,
3630 never had ABB on IVA domain, while OMAP5 does use ABB on MM domain,
DRA7 has it on all domains with the exception of CORE, RTC.

Hence, move the txdone mask definition over to structure describing
voltage domain.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
</entry>
<entry>
<title>ARM: hikey: Simplify README instructions.</title>
<updated>2016-04-25T19:10:36Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2016-04-20T16:14:03Z</published>
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<id>urn:sha1:532d5203e972092cb1029e49d906f28a0895ca39</id>
<content type='text'>
This patch updates and simplifies the hikey README. The old
instructions were hard to follow, and convoluted.

This patch also updates the link to the mcuimage.bin which was outdated.

Using an outdated mcuimage.bin results in the additional a53 cores
not coming online when the kernel issues PSCI requests to
arm trusted firmware (ATF).

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>ARM: hisilicon: hikey: Align memory node with upstream kernel</title>
<updated>2016-04-25T19:10:35Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2016-04-20T16:14:02Z</published>
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<id>urn:sha1:305b90919ea8c17edeb1e7d15ae5ca43f36bddc2</id>
<content type='text'>
The memory node gets automatically generated by U-Boot
in arch_fixup_fdt(), before passing control to the kernel
using U-Boots representation of the dram banks.

However the upstream kernel uses the memory node to carve-out
regions of RAM for various purposes. To make this work without
changing arch_fixup_fdt() which will effect many platforms
we replicate the upstream memory node layout using the dram
banks.

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>ARM: hisilicon: hikey: Implement reset_cpu() for hikey.</title>
<updated>2016-04-25T19:10:34Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2016-04-20T16:14:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9261f8b1809d6bf2075cfc97bbd0cac23e086716'/>
<id>urn:sha1:9261f8b1809d6bf2075cfc97bbd0cac23e086716</id>
<content type='text'>
This allows the reset command to reset the board from
u-boot.

=&gt; reset
resetting ...
INFO:    BL1: 0xf9810000 - 0xf9818000 [size = 32768]
NOTICE:  Booting Trusted Firmware
NOTICE:  BL1: v1.1(debug):7fb9b0e
NOTICE:  BL1: Built : 17:06:41, Apr 19 2016

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>ARM: hisilicon: hikey: Enable OF_CONTROL for hikey board.</title>
<updated>2016-04-25T19:10:34Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2016-04-20T16:13:59Z</published>
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<id>urn:sha1:cd593ed6999970cc705571332f0f3be7e40d1a96</id>
<content type='text'>
Currently only the serial pl01x driver is using DT,
and the other drivers still use platform data but
as more DT lands in the upstream kernel the aim is
to migrate the other drivers over to DT as well to
have a fully DT configured hikey u-boot.

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>MAINTAINERS: Add myself as maintainer for hikey</title>
<updated>2016-04-25T19:10:31Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2016-04-20T16:13:58Z</published>
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<id>urn:sha1:ae4dc15d98c0a591a41f449c6887707fa3891dd7</id>
<content type='text'>
This patch adds myself as maintainer for the hikey
U-Boot port.

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://www.denx.de/git/u-boot-imx</title>
<updated>2016-04-25T17:34:42Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-04-25T17:34:42Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=588d269ffe736c3dc03f63c3708d82eb33e670ee'/>
<id>urn:sha1:588d269ffe736c3dc03f63c3708d82eb33e670ee</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Add initial support for Technexion's PICO-IMX6UL-EMMC board</title>
<updated>2016-04-19T14:37:36Z</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@nxp.com</email>
</author>
<published>2016-04-18T12:56:16Z</published>
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<id>urn:sha1:69cc7dbf1f62492788ab810db7d8444a623c23c2</id>
<content type='text'>
Add support for Technexion's PICO-IMX6UL-EMMC board.

For information about this board, please visit:
http://www.technexion.com/products/pico/pico-som/pico-imx6-emmc

Signed-off-by: Richard Hu &lt;richard.hu@technexion.com&gt;
Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</content>
</entry>
<entry>
<title>board: ge: bx50v3: Fix to meet LVDS display power on timing</title>
<updated>2016-04-19T14:05:51Z</updated>
<author>
<name>Akshay Bhat</name>
<email>akshay.bhat@timesys.com</email>
</author>
<published>2016-04-12T22:14:00Z</published>
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<id>urn:sha1:8d293f49b419dd394cdf4b7a501ad86b782efc3f</id>
<content type='text'>
On a reset/reboot, the display power needs to be off for atleast 500ms
before turning it back on. So add a delay to the boot process to meet
the display timing requirement.

Signed-off-by: Akshay Bhat &lt;akshay.bhat@timesys.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
</feed>
