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<title>u-boot.git/board, branch v2016.11-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board?h=v2016.11-rc2</id>
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<updated>2016-10-15T17:03:19Z</updated>
<entry>
<title>Merge git://git.denx.de/u-boot-mpc85xx</title>
<updated>2016-10-15T17:03:19Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-10-15T17:03:19Z</published>
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<id>urn:sha1:78ad7157886badef2d69e264c366dbdd2eac040f</id>
<content type='text'>
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</entry>
<entry>
<title>pbl: use "wait" command instead of "flush" command</title>
<updated>2016-10-14T17:21:30Z</updated>
<author>
<name>Zhao Qiang</name>
<email>qiang.zhao@nxp.com</email>
</author>
<published>2016-09-08T04:55:33Z</published>
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<id>urn:sha1:c5938c10ef70c9b713415cc053b464a64f7c05f8</id>
<content type='text'>
PBL flush command is restricted to CCSR memory space. So use WAIT
PBI command to provide enough time for data to get flush in
target memory.

Signed-off-by: Zhao Qiang &lt;qiang.zhao@nxp.com&gt;
[York Sun: rewrap commit message]
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>Txxx/RCW: Split unified RCW to RCWs for sd, spi and nand.</title>
<updated>2016-10-14T17:21:03Z</updated>
<author>
<name>Zhao Qiang</name>
<email>qiang.zhao@nxp.com</email>
</author>
<published>2016-09-08T04:55:32Z</published>
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<id>urn:sha1:ec90ac7359a10513f1458ad5840858e6d8be0624</id>
<content type='text'>
T series boards use unified RCW for sd, spi and nand boot.
Now split txxx_rcw.cfg to txxx_sd_rcw.cfg, txxx_spi_rcw.cfg
and txxx_nand_rcw.cfg for SPI/NAND/SD boot.
And modify RCW[PBI_SRC] for them:
	PBI_SRC=5            for SPI 24-bit addressing
	PBI_SRC=6            for SD boot
	PBI_SRC=14           for IFC NAND boot

Signed-off-by: Zhao Qiang &lt;qiang.zhao@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-fdt</title>
<updated>2016-10-14T00:03:33Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-10-14T00:03:33Z</published>
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<id>urn:sha1:4504062b271bf4d1cf256e4e87e156de6029e088</id>
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</entry>
<entry>
<title>cmd/fdt: add possibilty to have 'extrasize' on fdt resize</title>
<updated>2016-10-13T19:54:10Z</updated>
<author>
<name>Hannes Schmelzer</name>
<email>hannes.schmelzer@br-automation.com</email>
</author>
<published>2016-09-20T16:10:43Z</published>
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<id>urn:sha1:ef47683646516002694729986d19713e49b903e3</id>
<content type='text'>
Sometimes devicetree nodes and or properties are added out of the u-boot
console, maybe through some script or manual interaction.

The devicetree as loaded or embedded is quite small, so the devicetree
has to be resized to take up those new nodes/properties.

In original the devicetree was only extended by effective
4 * add_mem_rsv.

With this commit we can add an argument to the "fdt resize" command,
which takes the extrasize to be added.

Signed-off-by: Hannes Schmelzer &lt;hannes.schmelzer@br-automation.com&gt;

Signed-off-by: Hannes Schmelzer &lt;oe5hpm@oevsv.at&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: am335x: Always set eth/eth1addr environment variable</title>
<updated>2016-10-13T17:25:10Z</updated>
<author>
<name>Roger Quadros</name>
<email>rogerq@ti.com</email>
</author>
<published>2016-08-24T12:35:51Z</published>
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<id>urn:sha1:f411b5cca48f0eee9443b85e7b75a46356bd2327</id>
<content type='text'>
Ethernet ports might be used in the kernel even if CPSW driver
is disabled at u-boot. So always set ethaddr and eth1addr
environment variable from efuse.

Retain usbnet_devaddr as it is required for SPL USB eth boot.

Signed-off-by: Roger Quadros &lt;rogerq@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>board: am335x-icev2: add ethernet phy mode detection logic</title>
<updated>2016-10-13T17:25:06Z</updated>
<author>
<name>Roger Quadros</name>
<email>rogerq@ti.com</email>
</author>
<published>2016-08-24T12:35:50Z</published>
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<id>urn:sha1:e607ec993b65462eff960fd5f28016db6b0a61bd</id>
<content type='text'>
Both ethernet ports can be used as CPSW ethernet (RMII mode)
or PRU ethernet (MII mode) by setting the jumper near the port.
Read the jumper value and set the pinmux, external mux and
PHY clock accordingly.

As jumper line is overridden by PHY RX_DV pin immediately
after bootstrap (power-up/reset), we have to use GPIO edge
detection to capture the jumper line status.

As u-boot doesn't provide any infrastructure for GPIO edge
detection, we directly access the GPIO registers.

Signed-off-by: Roger Quadros &lt;rogerq@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-x86</title>
<updated>2016-10-12T17:59:26Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-10-12T12:32:09Z</published>
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<id>urn:sha1:5ebd27d860ec0c6e36f1b0f973653fe66a7360be</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge git://www.denx.de/git/u-boot-marvell</title>
<updated>2016-10-12T12:30:08Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-10-12T12:30:08Z</published>
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<id>urn:sha1:99615d812f1c5f954c8bbc1e0cdfcb15e5cbe675</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2016-10-12T12:29:42Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-10-12T12:29:42Z</published>
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<id>urn:sha1:711b534120c0a5f73cdb9a25eb91f9aa0c5e09ab</id>
<content type='text'>
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;

Conflicts:
	include/configs/ls1021aqds.h
	include/configs/ls1021atwr.h
</content>
</entry>
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