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<title>u-boot.git/board, branch v2018.01-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board?h=v2018.01-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/board?h=v2018.01-rc2'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2017-12-18T23:39:18Z</updated>
<entry>
<title>Merge git://git.denx.de/u-boot-rockchip</title>
<updated>2017-12-18T23:39:18Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-12-18T23:39:18Z</published>
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<id>urn:sha1:eeab579aa8d76b96afbd0862029d4452943bafbe</id>
<content type='text'>
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</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2017-12-18T23:39:00Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-12-18T23:39:00Z</published>
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<id>urn:sha1:1a3fc354b50b2a86361964b6d695ce26058248f5</id>
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<entry>
<title>Merge tag 'xilinx-for-v2018.01-rc2-v2' of git://www.denx.de/git/u-boot-microblaze</title>
<updated>2017-12-18T17:23:27Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-12-18T17:23:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=90d75d2efc376094b50d84de80e9cb8b3bcae032'/>
<id>urn:sha1:90d75d2efc376094b50d84de80e9cb8b3bcae032</id>
<content type='text'>
Xilinx changes for v2018.01-rc2-v2

fpga:
- Enable loading bitstream via fit image for !xilinx platforms

zynq:
- Fix SPL SD boot mode

zynqmp:
- Not not reset in panic
- Do not use simple allocator because of fat changes
- Various dt chagnes
- modeboot variable setup
- Fix fpga loading on automotive devices
- Fix coverity issues

test:
- Fix env test for !hush case - Stephen's patch
</content>
</entry>
<entry>
<title>rockchip: evb-rk3399: update document for board bring up</title>
<updated>2017-12-18T16:17:51Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-12-15T03:15:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=157c74b69b8bafa30940516b97f07ae618b555df'/>
<id>urn:sha1:157c74b69b8bafa30940516b97f07ae618b555df</id>
<content type='text'>
Since we support ATF in SPL and add script for it, let's make the
document up to date.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Access timestamp_ref_ctrl register only if running in el3</title>
<updated>2017-12-18T08:32:07Z</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2017-12-07T09:35:30Z</published>
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<id>urn:sha1:ec60a279ec6138d9d9f8e73b12625e0052ec4793</id>
<content type='text'>
Access the timestamp ref ctrl register only if runinng
at el3 level otherwise just return. This change fixes
the issue when CRL APB is marked as secure and accessing
when not in el3 causes exception.

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>rockchip: move CONFIG_ENV_SIZE and CONFIG_ENV_OFFSET to Kconfig</title>
<updated>2017-12-17T23:26:16Z</updated>
<author>
<name>Klaus Goger</name>
<email>klaus.goger@theobroma-systems.com</email>
</author>
<published>2017-12-11T16:56:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=81f53b0dafdfe9458f6d04fc5ec2732c2ea23a71'/>
<id>urn:sha1:81f53b0dafdfe9458f6d04fc5ec2732c2ea23a71</id>
<content type='text'>
This commit adds ENV_SIZE and ENV_OFFSET configuration items for
ARCH_ROCKCHIP, but keeps these non-visible (i.e. not prompt is given).
With these new items present, the configuration from the header files
is moved to Kconfig.

Keeping these non-visible is necessary to have the possibility to
select new default values if CONFIG_IS_IN_* is changed (interactively
or with oldconfig). Otherwise it will always be set to a previous
value if used with a prompt.  As an example if we do a defconfig with
CONFIG_IS_IN_MMC and change it to CONFIG_IS_IN_SPI_FLASH via
menuconfig, ENV_SIZE and ENV_OFFSET will not be changed to the correct
values as defconfig will already have set them to the default values
of CONFIG_IS_IN_MMC in .config.

Signed-off-by: Klaus Goger &lt;klaus.goger@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3399-puma: set gpio4cd iodomain to 1.8V</title>
<updated>2017-12-17T15:59:41Z</updated>
<author>
<name>Jakob Unterwurzacher</name>
<email>jakob.unterwurzacher@theobroma-systems.com</email>
</author>
<published>2017-12-15T15:23:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aa41220f6f7c79284ce5880e2533f81c125237a4'/>
<id>urn:sha1:aa41220f6f7c79284ce5880e2533f81c125237a4</id>
<content type='text'>
The PCIe reset signal is connected to GPIO4_C6 on the Puma
module. This pin is supplied by 1.8V, but the default iodomain
setting is 3.0V and in this situation the pin is unable to go
high.

Linux assumes that this signal works in early boot
as PCIe is probed before loading the iodomain driver.

Make PCIe work in Linux by setting the gpio4cd iodomain to 1.8V.

Signed-off-by: Jakob Unterwurzacher &lt;jakob.unterwurzacher@theobroma-systems.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>armv8: ls1012ardb: support hwconfig for eSDHC1 enabling</title>
<updated>2017-12-14T21:08:47Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2017-12-08T07:35:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6aaa539f47fc9305de5af64c02b076136852cc3b'/>
<id>urn:sha1:6aaa539f47fc9305de5af64c02b076136852cc3b</id>
<content type='text'>
I2C reading for DIP switch setting is not reliable for LS1012ARDB
RevD and later versions. This patch is to add hwconfig support to
enable/disable eSDHC1 manually for these boards. Also drop 'status'
fix-up for eSDHC0 and leave it as it is. It shouldn't always be
fixed up with 'okay'.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: ls1012ardb: add more board version information</title>
<updated>2017-12-14T21:08:47Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2017-12-08T07:35:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4a47bf8a2ba61e21b022b81e2234fdb47570ad22'/>
<id>urn:sha1:4a47bf8a2ba61e21b022b81e2234fdb47570ad22</id>
<content type='text'>
Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and
detect it when u-boot starts up.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: ls1012ardb: clean up definitions for I2C IO expanders</title>
<updated>2017-12-14T21:08:47Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2017-12-08T07:35:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=481fb01f41feec75366cd0790ff672638384b60a'/>
<id>urn:sha1:481fb01f41feec75366cd0790ff672638384b60a</id>
<content type='text'>
This patch is to clean up definitions for I2C IO expanders.
The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2.
Fixed it in this patch.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
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