<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/board, branch v2026.01-rc5</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>rockchip: rock5b-rk3588: Add support for Radxa ROCK 5T</title>
<updated>2025-12-13T16:02:10+00:00</updated>
<author>
<name>FUKAUMI Naoki</name>
<email>naoki@radxa.com</email>
</author>
<published>2025-11-07T06:47:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=73159af02d023d01d9c4c08d319eb86cb10f1983'/>
<id>73159af02d023d01d9c4c08d319eb86cb10f1983</id>
<content type='text'>
Include the FDT for Radxa ROCK 5T in the FIT, in addition to those for
5B and 5B+, and add board selection code to load the 5T FDT when the
DRAM type is LPDDR5 and ADC channel 5 value is close to 1016.

Signed-off-by: FUKAUMI Naoki &lt;naoki@radxa.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Include the FDT for Radxa ROCK 5T in the FIT, in addition to those for
5B and 5B+, and add board selection code to load the 5T FDT when the
DRAM type is LPDDR5 and ADC channel 5 value is close to 1016.

Signed-off-by: FUKAUMI Naoki &lt;naoki@radxa.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rock5b-rk3588: Add support for ROCK 5B+</title>
<updated>2025-12-13T16:02:10+00:00</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-08-01T17:09:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2df3666a241b706005ac8130c06188678c32ba39'/>
<id>2df3666a241b706005ac8130c06188678c32ba39</id>
<content type='text'>
Include FDTs for both ROCK 5B and 5B+ in the FIT and add board selection
code to load the 5B+ FDT when the DRAM type is LPDDR5 and ADC channel 5
value is close to 4095.

  U-Boot 2025.07 (Jul 14 2025 - 21:28:20 +0000)

  Model: Radxa ROCK 5B+
  SoC:   RK3588
  DRAM:  8 GiB

Features tested on a ROCK 5B+ v1.2:
- SD-card boot
- eMMC boot
- SPI flash boot
- PCIe/NVMe
- Ethernet
- USB/TCPM

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Include FDTs for both ROCK 5B and 5B+ in the FIT and add board selection
code to load the 5B+ FDT when the DRAM type is LPDDR5 and ADC channel 5
value is close to 4095.

  U-Boot 2025.07 (Jul 14 2025 - 21:28:20 +0000)

  Model: Radxa ROCK 5B+
  SoC:   RK3588
  DRAM:  8 GiB

Features tested on a ROCK 5B+ v1.2:
- SD-card boot
- eMMC boot
- SPI flash boot
- PCIe/NVMe
- Ethernet
- USB/TCPM

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: Add support for RAM boot from maskrom mode</title>
<updated>2025-12-13T16:02:10+00:00</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-08-02T22:07:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e22335a221f88e7f61171e752ca195663f86d81f'/>
<id>e22335a221f88e7f61171e752ca195663f86d81f</id>
<content type='text'>
The BootROM in Rockchip SoCs will enter maskrom mode when boot firmware
cannot be found in nand/spi/mmc storage.

In maskrom mode the USB OTG port can accept one of two custom commands.

Initially a 0x471 command to load TPL into SRAM. After TPL has been
executed and it has returned back-to-BROM, a 0x472 command to load SPL
into start of DRAM.

Add two binman images that can be used to RAM boot from maskrom mode:
- u-boot-rockchip-usb471.bin that contains TPL to init DRAM.
- u-boot-rockchip-usb472.bin that contains SPL and the normal FIT
  payload with i.e. U-Boot proper, TF-A and FDT.

A config fragment rockchip-ramboot.config can be used to enable building
of these two binman images, e.g.:

  make generic-rk3588_defconfig rockchip-ramboot.config

These binman images can be used with the proprietary rkbin boot_merger
tool to create a special loader image that can be used with tools such
as rkdeveloptool or rockusb tools to RAM boot from maskrom, e.g.:

  Create loader image:
    $ ../rkbin/tools/boot_merger ./RK3588MINIALL.ini

  Boot from maskrom:
    $ rkdeveloptool db u-boot-rockchip-rk3588-loader.bin
   or
    $ rockusb download-boot u-boot-rockchip-rk3588-loader.bin

Another option that does not require use of proprietary tools is using
open source tools such as rkflashtool or rkusbboot that can load the
binman images directly without any need to first create a special loader
image to RAM boot from maskrom, e.g.:

  $ rkflashtool l &lt; u-boot-rockchip-usb471.bin
  $ rkflashtool L &lt; u-boot-rockchip-usb472.bin
 or
  $ rkusbboot u-boot-rockchip-usb471.bin u-boot-rockchip-usb472.bin

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Tested-by: Arnaud Patard &lt;arnaud.patard@collabora.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The BootROM in Rockchip SoCs will enter maskrom mode when boot firmware
cannot be found in nand/spi/mmc storage.

In maskrom mode the USB OTG port can accept one of two custom commands.

Initially a 0x471 command to load TPL into SRAM. After TPL has been
executed and it has returned back-to-BROM, a 0x472 command to load SPL
into start of DRAM.

Add two binman images that can be used to RAM boot from maskrom mode:
- u-boot-rockchip-usb471.bin that contains TPL to init DRAM.
- u-boot-rockchip-usb472.bin that contains SPL and the normal FIT
  payload with i.e. U-Boot proper, TF-A and FDT.

A config fragment rockchip-ramboot.config can be used to enable building
of these two binman images, e.g.:

  make generic-rk3588_defconfig rockchip-ramboot.config

These binman images can be used with the proprietary rkbin boot_merger
tool to create a special loader image that can be used with tools such
as rkdeveloptool or rockusb tools to RAM boot from maskrom, e.g.:

  Create loader image:
    $ ../rkbin/tools/boot_merger ./RK3588MINIALL.ini

  Boot from maskrom:
    $ rkdeveloptool db u-boot-rockchip-rk3588-loader.bin
   or
    $ rockusb download-boot u-boot-rockchip-rk3588-loader.bin

Another option that does not require use of proprietary tools is using
open source tools such as rkflashtool or rkusbboot that can load the
binman images directly without any need to first create a special loader
image to RAM boot from maskrom, e.g.:

  $ rkflashtool l &lt; u-boot-rockchip-usb471.bin
  $ rkflashtool L &lt; u-boot-rockchip-usb472.bin
 or
  $ rkusbboot u-boot-rockchip-usb471.bin u-boot-rockchip-usb472.bin

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Tested-by: Arnaud Patard &lt;arnaud.patard@collabora.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: stm32: Add missing build of debug UART init code on DH STM32MP1 DHSOM</title>
<updated>2025-12-09T14:24:36+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@mailbox.org</email>
</author>
<published>2025-11-18T23:17:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=78e94666dd794ccfab561a9ef6e5b9d6a785ee97'/>
<id>78e94666dd794ccfab561a9ef6e5b9d6a785ee97</id>
<content type='text'>
Commit c37a6684818d ("stm32mp: fix compilation issue with DEBUG_UART")
split the debug UART initialization code into two files, but failed to
update other non-ST boards. This did not lead to noticeable breakage
until debug UART is enabled, which is not the default. Update the
Makefile accordingly to allow debug UART to work.

Fixes: c37a6684818d ("stm32mp: fix compilation issue with DEBUG_UART")
Signed-off-by: Marek Vasut &lt;marek.vasut@mailbox.org&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit c37a6684818d ("stm32mp: fix compilation issue with DEBUG_UART")
split the debug UART initialization code into two files, but failed to
update other non-ST boards. This did not lead to noticeable breakage
until debug UART is enabled, which is not the default. Update the
Makefile accordingly to allow debug UART to work.

Fixes: c37a6684818d ("stm32mp: fix compilation issue with DEBUG_UART")
Signed-off-by: Marek Vasut &lt;marek.vasut@mailbox.org&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: stm32: Add 1 GiB DRAM settings for DH STM32MP13xx DHCOR SoM</title>
<updated>2025-12-09T14:24:30+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@mailbox.org</email>
</author>
<published>2025-11-18T23:19:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=86ff2cfa80e9abb71789b299cfcbfc0b9337174d'/>
<id>86ff2cfa80e9abb71789b299cfcbfc0b9337174d</id>
<content type='text'>
Add DRAM settings for 1 GiB variant of DH STM32MP13xx DHCOR SoM
and support for SoM DRAM coding HW straps decoding and automatic
DRAM configuration selection. Enable CONFIG_BOARD_EARLY_INIT_F on
all STM32MP1 DHSOM, as it is required for the HW straps decoding.

Signed-off-by: Marek Vasut &lt;marek.vasut@mailbox.org&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add DRAM settings for 1 GiB variant of DH STM32MP13xx DHCOR SoM
and support for SoM DRAM coding HW straps decoding and automatic
DRAM configuration selection. Enable CONFIG_BOARD_EARLY_INIT_F on
all STM32MP1 DHSOM, as it is required for the HW straps decoding.

Signed-off-by: Marek Vasut &lt;marek.vasut@mailbox.org&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>omap3_evm: Take over maintainership</title>
<updated>2025-12-08T14:48:10+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-12-07T14:50:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ae184121e00b131b84c04885cecfded18e320a8d'/>
<id>ae184121e00b131b84c04885cecfded18e320a8d</id>
<content type='text'>
After talking with Derald, take over the maintainership role for this
platform.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
After talking with Derald, take over the maintainership role for this
platform.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MAINTAINERS: update my email address</title>
<updated>2025-12-06T14:14:59+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linusw@kernel.org</email>
</author>
<published>2025-12-05T16:01:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b5d592eff12c8a7ad6a8d88573faaef0894f00b0'/>
<id>b5d592eff12c8a7ad6a8d88573faaef0894f00b0</id>
<content type='text'>
I am moving over to using my email address at kernel.org.
Change this in all the affected MAINTAINERS files.

Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
I am moving over to using my email address at kernel.org.
Change this in all the affected MAINTAINERS files.

Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>board: BuR: Update MAINTAINERS files</title>
<updated>2025-12-04T19:35:45+00:00</updated>
<author>
<name>Wolfgang Wallner</name>
<email>wolfgang.wallner@br-automation.com</email>
</author>
<published>2025-12-02T09:43:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=97e202a72160ea038dda46130d911546e66a189c'/>
<id>97e202a72160ea038dda46130d911546e66a189c</id>
<content type='text'>
The MAINTAINERS files for B&amp;R boards are not in sync
with the current file names. Update the files so
that they are correct again.

Signed-off-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The MAINTAINERS files for B&amp;R boards are not in sync
with the current file names. Update the files so
that they are correct again.

Signed-off-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Change email addresses for B&amp;R Industrial Automation</title>
<updated>2025-12-04T19:35:29+00:00</updated>
<author>
<name>Wolfgang Wallner</name>
<email>wolfgang.wallner@br-automation.com</email>
</author>
<published>2025-12-02T09:24:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d9a765222dae01ea24fc3240cc05745b4b47c698'/>
<id>d9a765222dae01ea24fc3240cc05745b4b47c698</id>
<content type='text'>
B&amp;R Industrial Automation has been acquired by ABB in 2017, and this
will be reflected in our email addresses beginning from December 2025.

The email addresses change as follows:
 @br-automation.com -&gt; @&lt;country-code&gt;.abb.com

The existing email addresses will be valid until December 2026.

Add entries for Bernhard Messerklinger and myself to .mailmap, and
update the MAINTAINERS files.

Signed-off-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
Signed-off-by: Wolfgang Wallner &lt;wolfgang.wallner@at.abb.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
B&amp;R Industrial Automation has been acquired by ABB in 2017, and this
will be reflected in our email addresses beginning from December 2025.

The email addresses change as follows:
 @br-automation.com -&gt; @&lt;country-code&gt;.abb.com

The existing email addresses will be valid until December 2026.

Add entries for Bernhard Messerklinger and myself to .mailmap, and
update the MAINTAINERS files.

Signed-off-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
Signed-off-by: Wolfgang Wallner &lt;wolfgang.wallner@at.abb.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: renesas: Add Renesas R-Car X5H R8A78000 Ironhide board code</title>
<updated>2025-12-02T23:17:15+00:00</updated>
<author>
<name>Hai Pham</name>
<email>hai.pham.ud@renesas.com</email>
</author>
<published>2025-12-02T18:34:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cf71963778ee1c1ac4b86c78acae138591b4169c'/>
<id>cf71963778ee1c1ac4b86c78acae138591b4169c</id>
<content type='text'>
Add initial support for Renesas R-Car X5H R8A78000 Ironhide board.
This consists mainly of DTs, Makefile and Kconfig entries and board
specific configuration files.

The DTs will be gradually switched over to Linux DTs via OF_UPSTREAM
once Linux DTs become available upstream, as upstreaming progresses.

Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add initial support for Renesas R-Car X5H R8A78000 Ironhide board.
This consists mainly of DTs, Makefile and Kconfig entries and board
specific configuration files.

The DTs will be gradually switched over to Linux DTs via OF_UPSTREAM
once Linux DTs become available upstream, as upstreaming progresses.

Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
