u-boot.git/cmd/riscv, branch v2022.07

cmd/sbi: add implementation ID 6 - Coffer

2022-05-26T10:37:55+00:00

The sbi command displays the ID of the implementation of the RISC-V
Supervisor Binary Interface Specification. A new ID for Coffer has recently
been added.

Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Leo Yu-Chi Liang

cmd/sbi: add missing SBI information

2022-04-06T01:40:05+00:00

Let the sbi command display:

* machine vendor ID
* machine architecture ID
* machine implementation ID

With this patch the output for the HiFive Unmatched looks like

    => sbi
    SBI 0.3
    OpenSBI 0.9
    Machine:
      Vendor ID 489
      Architecture ID 8000000000000007
      Implementation ID 20181004
    Extensions:
      sbi_set_timer
      sbi_console_putchar
      sbi_console_getchar
      sbi_clear_ipi
      sbi_send_ipi
      sbi_remote_fence_i
      sbi_remote_sfence_vma
      sbi_remote_sfence_vma_asid
      sbi_shutdown
      SBI Base Functionality
      Timer Extension
      IPI Extension
      RFENCE Extension
      Hart State Management Extension
      System Reset Extension

Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Sean Anderson

cmd: sbi: add Performance Monitoring Unit Extension

2022-04-06T01:40:05+00:00

Version 1.0-rc3 of the RISC-V Supervisor Binary Interface Specification
has added the Performance Monitoring Unit Extension.

The sbi command should be able to detect it.

Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Bin Meng

cmd: sbi: show SBI implementation version

2021-11-08T07:35:55+00:00

Let the sbi command show the SBI implementation version

Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Leo Yu-Chi Liang 
Reviewed-by: Rick Chen

cmd/sbi: use constants instead of numerical values

2021-10-07T08:08:23+00:00

Use constants for extension IDs.

Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Sean Anderson 
Reviewed-by: Leo Yu-Chi Liang 
Reviewed-by: Bin Meng

cmd/exception: support ebreak exception on RISC-V

2021-05-05T08:13:12+00:00

The ebreak instruction should generate a breakpoint exception.

Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Bin Meng 
Reviewed-by: Rick Chen

cmd/riscv/sbi: support System Reset Extension

2021-02-25T10:06:08+00:00

Let the sbi command detect the 'System Reset Extension'
(EID #0x53525354 "SRST").

Cf. https://github.com/riscv/riscv-sbi-doc

Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Pragnesh Patel 
Reviewed-by: Leo Liang 
Reviewed-by: Bin Meng

cmd: add more implementation IDs to sbi command

2021-01-29T15:36:49+00:00

Additional SBI implementation IDs have been added to the upcoming
next version of the SBI specification.

https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

Signed-off-by: Heinrich Schuchardt

cmd: provide command sbi

2020-08-25T01:34:47+00:00

Provide a command to display information about the SBI implementation.

The output might look like:

=> sbi
SBI 0.2
OpenSBI
Extensions:
  sbi_set_timer
  sbi_console_putchar
  sbi_console_getchar
  sbi_clear_ipi
  sbi_send_ipi
  sbi_remote_fence_i
  sbi_remote_sfence_vma
  sbi_remote_sfence_vma_asid
  sbi_shutdown
  SBI Base Functionality
  Timer Extension
  IPI Extension
  RFENCE Extension
  Hart State Management Extension

The command can be used to construct a unit test checking that the
communication with the SEE is working.

Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Atish Patra 
Reviewed-by: Bin Meng 
Tested-by: Bin Meng 
Reviewed-by: Pragnesh Patel 
Tested-by:  Pragnesh Patel 
Reviewed-by: Rick Chen 
Tested-by: Rick Chen

cmd: exception: unaligned data access on RISC-V

2020-08-14T06:39:34+00:00

The command 'exception' can be used to test the handling of exceptions.

Currently the exception command only allows to create an illegal
instruction exception on RISC-V.

Provide a sub-command 'exception unaligned' to cause a misaligned load
address exception.

Adjust the online help for 'exception undefined'.

Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Rick Chen