u-boot.git/cmd/ti/Kconfig, branch master Unnamed repository; edit this file 'description' to name the repository. cmd: ti: Add DDRSS Inline ECC Error Injection command 2025-10-15T21:08:27+00:00 Georgi Vlaev g-vlaev@ti.com 2025-10-08T11:34:35+00:00 4e4bbb49f9298ee8e5891c168ea4d6aa0463d285 Introduce a new version of the Keystone-II "ddr" command for testing the inline ECC support in the DDRSS bridge available on K3 devices. The ECC hardware support in K3's DDRSS and the test method differ substantially from what we support in the K2 variant of the command. This K3 DDRSS command currently supports only single controller testing. The ECC error injection procedure follows these steps: 1) Flush and disable the data cache. 2) Disable the protected ECC Rx range. 3) Flip a bit in the address. 4) Restore the range to original. 5) Read the modified value (corrected). 6) Re-enable the data cache. This will cause the 1-bit ECC error count to increase while the read will return the corrected value. The K3 version of the command extends the syntax for the "ecc_err" argument by also introducing an argument for range which specifies which range (0, 1, 2) the address is located in. Multi-bit ECC errors are uncorrectable and will lead to a synchronous abort. Signed-off-by: Georgi Vlaev <g-vlaev@ti.com> Signed-off-by: Santhosh Kumar K <s-k6@ti.com> [n-francis@ti.com: Add J7 and multiple-region support, simplify logic] Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> 
Introduce a new version of the Keystone-II "ddr" command for testing the
inline ECC support in the DDRSS bridge available on K3 devices. The ECC
hardware support in K3's DDRSS and the test method differ substantially
from what we support in the K2 variant of the command. This K3 DDRSS
command currently supports only single controller testing.

The ECC error injection procedure follows these steps:
1) Flush and disable the data cache.
2) Disable the protected ECC Rx range.
3) Flip a bit in the address.
4) Restore the range to original.
5) Read the modified value (corrected).
6) Re-enable the data cache.

This will cause the 1-bit ECC error count to increase while the read
will return the corrected value.

The K3 version of the command extends the syntax for the "ecc_err"
argument by also introducing an argument for range which specifies which
range (0, 1, 2) the address is located in.

Multi-bit ECC errors are uncorrectable and will lead to a synchronous
abort.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
[n-francis@ti.com: Add J7 and multiple-region support, simplify logic]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
cmd/ti: Update Kconfig logic and Makefile recursion logic 2023-10-16T14:25:02+00:00 Tom Rini trini@konsulko.com 2023-10-07T19:36:58+00:00 1b377a9ffeb5bf5716f75d6f52bc3fe6a00adc8c - Add some dependencies to CMD_DDR3 as this is only valid on some platforms (which tend to select it as well). - The proper gate for going in to cmd/ti is not CONFIG_TI_COMMON_CMD_OPTIONS as nothing under there is controlled by that symbol but the general TI architecture options. Signed-off-by: Tom Rini <trini@konsulko.com> 
- Add some dependencies to CMD_DDR3 as this is only valid on some
  platforms (which tend to select it as well).
- The proper gate for going in to cmd/ti is not
  CONFIG_TI_COMMON_CMD_OPTIONS as nothing under there is controlled by
  that symbol but the general TI architecture options.

Signed-off-by: Tom Rini <trini@konsulko.com>
cmd: ti: pd: Add debug command for K3 power domains 2021-06-11T11:04:52+00:00 Tero Kristo t-kristo@ti.com 2021-06-11T08:45:16+00:00 f79753c3defb15c037e4e8be6235b2a37a8b56d4 Add support command for debugging K3 power domains. This is useful with the HSM rearch setup, where power domains are directly controlled by SPL instead of going through the TI SCI layer. The debugging support is only available in the u-boot codebase though, so the raw register access power domain layer must be enabled on u-boot side for this to work. By default, u-boot side uses the TI SCI layer, and R5 SPL only uses the direct access methods. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> 
Add support command for debugging K3 power domains. This is useful with
the HSM rearch setup, where power domains are directly controlled by SPL
instead of going through the TI SCI layer. The debugging support is only
available in the u-boot codebase though, so the raw register access
power domain layer must be enabled on u-boot side for this to work. By
default, u-boot side uses the TI SCI layer, and R5 SPL only uses the
direct access methods.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
arm: keystone: Move cmd_ddr3 to a common place 2018-01-19T20:49:26+00:00 Lokesh Vutla lokeshvutla@ti.com 2017-12-29T06:17:49+00:00 5cd9661dc68b40e6c03400dba131b92e71f9e730 Move cmd_ddr3 to cmd/ti in order to make it build for non-keystone TI platforms. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Rename to ddr3.c not cmd_ddr3.c] Signed-off-by: Tom Rini <trini@konsulko.com> 
Move cmd_ddr3 to cmd/ti in order to make
it build for non-keystone TI platforms.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Rename to ddr3.c not cmd_ddr3.c]
Signed-off-by: Tom Rini <trini@konsulko.com>