u-boot.git/cmd, branch v2021.10 Unnamed repository; edit this file 'description' to name the repository. Merge tag 'mmc-2021-9-13' of https://source.denx.de/u-boot/custodians/u-boot-mmc 2021-09-13T12:31:41+00:00 Tom Rini trini@konsulko.com 2021-09-13T12:31:41+00:00 7958292f5ffa4ecdaaf4c73c6df28006051db6e0 Support using mmc command for enumerating mmc card in a given mode Fix device_remove in mmc Fix switch issue with send_status disabled Drop 1ms delay in fsl_esdhc command sending Revert "mmc: sdhci: set to INT_DATA_END when there are data" 
Support using mmc command for enumerating mmc card in a given mode
Fix device_remove in mmc
Fix switch issue with send_status disabled
Drop 1ms delay in fsl_esdhc command sending
Revert "mmc: sdhci: set to INT_DATA_END when there are data"
efi_loader: eliminate EFI_CALL() in nvedit_efi.c 2021-09-11T09:02:02+00:00 Heinrich Schuchardt xypron.glpk@gmx.de 2021-09-09T05:39:40+00:00 f4c1a14f96bde3b4437216092fed43acb2b9f933 Reduce the code size by avoiding using the external UEFI API and using our internal functions instead. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> 
Reduce the code size by avoiding using the external UEFI API and using our
internal functions instead.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
mmc: Add support for enumerating MMC card in a given mode using mmc command 2021-09-10T10:17:04+00:00 Aswath Govindraju a-govindraju@ti.com 2021-08-13T17:34:41+00:00 19f7a34a4642e25aa8b80c6d75129fe7848a158d Add support for enumerating MMC card in a given mode using mmc rescan and mmc dev commands. The speed mode is provided as the last argument in these commands and is indicated using the index from enum bus_mode in include/mmc.h. A speed mode can be set only if it has already been enabled in the device tree. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> 
Add support for enumerating MMC card in a given mode using mmc rescan and
mmc dev commands. The speed mode is provided as the last argument in these
commands and is indicated using the index from enum bus_mode in
include/mmc.h. A speed mode can be set only if it has already been enabled
in the device tree.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
common: Remove unused CONFIG_FIT_SHAxxx selectors 2021-09-08T20:10:34+00:00 Alexandru Gagniuc mr.nuke.me@gmail.com 2021-09-03T00:54:17+00:00 eb5171ddec9d3b04c2517b60e69dc707e92cf716 Originally CONFIG_FIT_SHAxxx enabled specific SHA algos for and only for hash_calculate() in common/image-fit.c. However, since commit 14f061dcb1 ("image: Drop IMAGE_ENABLE_SHAxxx"), the correct selector was changed to CONFIG_SHAxxx. The extra "_FIT_" variants are neither used, nor needed. Remove them. One defconfig disables FIT_SHA256, which is now changed to 'SHA256'. CMD_MVEBU_BUBT needs to select select SHA256 to avoid undefined references to "sha256_*()". bubt.c needs sha256, so this selection is correct. It is not clear why this problem did not manifest before. Note that SHA selection in SPL is broken for this exact reason. There is no corresponding SPL_SHAxxx. Fixing this is is beyond the scope of this change. Also note that we make CONFIG_FIT now imply SHA256, to make up for FIT_SHA256 previously being a default y option. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Add imply SHA256 to FIT] Signed-off-by: Tom Rini <trini@konsulko.com> 
Originally CONFIG_FIT_SHAxxx enabled specific SHA algos for and only
for hash_calculate() in common/image-fit.c. However, since commit
14f061dcb1 ("image: Drop IMAGE_ENABLE_SHAxxx"),
the correct selector was changed to CONFIG_SHAxxx.

The extra "_FIT_" variants are neither used, nor needed. Remove them.
One defconfig disables FIT_SHA256, which is now changed to 'SHA256'.

CMD_MVEBU_BUBT needs to select select SHA256 to avoid undefined
references to "sha256_*()". bubt.c needs sha256, so this selection is
correct. It is not clear why this problem did not manifest before.

Note that SHA selection in SPL is broken for this exact reason. There
is no corresponding SPL_SHAxxx. Fixing this is is beyond the scope of
this change.

Also note that we make CONFIG_FIT now imply SHA256, to make up for
FIT_SHA256 previously being a default y option.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[trini: Add imply SHA256 to FIT]
Signed-off-by: Tom Rini <trini@konsulko.com>
Merge tag 'xilinx-for-v2021.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze 2021-08-27T12:33:02+00:00 Tom Rini trini@konsulko.com 2021-08-27T12:33:02+00:00 b9cb74a5aa256fc34a1b2b9dd847a985b91f34f6 Xilinx changes for v2021.10-rc3 xilinx: - Disable CONFIG_ARCH_FIXUP_FDT_MEMORY - Print information about cpu via soc drivers and enable DISPLAY_CPUINFO - Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT zynq: - Wire single QSPI - Use power-source instead of io-standard properties - Enable nor on zc770-xm012 zynqmp: - Change handling around multi_boot() - Setup offset for u-boot.itb in spi - Generate run time dfu_alt_info for capsule update - Use explicit values for enums (zynqmp_firmware.h) - Enable RTC/SHA1/BUTTON/BUTTON_GPIO command - Disable WDT driver by default - Bind usb/scsi via preboot because of EFI - DT updates/fixes - Add soc driver - Fix SPL SPI boot mode versal: - Add soc driver sdhci: - Update tap delay programming for zynq_sdhci driver cmd: - Fix RTC uclass handling in date command - Update pwm help message - Update reset help message watchdog: - Fix wwdt compilation rtc: - Deal with seq alias in rtc uclass - Add zynqmp RTC driver fdt: - Add kernel-doc for fdt_fixup_memory_banks() 
Xilinx changes for v2021.10-rc3

xilinx:
- Disable CONFIG_ARCH_FIXUP_FDT_MEMORY
- Print information about cpu via soc drivers and enable DISPLAY_CPUINFO
- Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT

zynq:
- Wire single QSPI
- Use power-source instead of io-standard properties
- Enable nor on zc770-xm012

zynqmp:
- Change handling around multi_boot()
- Setup offset for u-boot.itb in spi
- Generate run time dfu_alt_info for capsule update
- Use explicit values for enums (zynqmp_firmware.h)
- Enable RTC/SHA1/BUTTON/BUTTON_GPIO command
- Disable WDT driver by default
- Bind usb/scsi via preboot because of EFI
- DT updates/fixes
- Add soc driver
- Fix SPL SPI boot mode

versal:
- Add soc driver

sdhci:
- Update tap delay programming for zynq_sdhci driver

cmd:
- Fix RTC uclass handling in date command
- Update pwm help message
- Update reset help message

watchdog:
- Fix wwdt compilation

rtc:
- Deal with seq alias in rtc uclass
- Add zynqmp RTC driver

fdt:
- Add kernel-doc for fdt_fixup_memory_banks()
cmd: boot: Update reset usage message 2021-08-26T06:08:11+00:00 Michal Simek michal.simek@xilinx.com 2021-08-11T10:01:25+00:00 aa5fb3de23dd05e6da3e3cf7fc20eea983a9dab9 The commit 573a3811edc8 ("sysreset: psci: support system reset in a generic way with PSCI") has added support for warm reset via PSCI but this hasn't been reflected in usage message and user has to look at the code how to run it. That's why update usage text to make this clear. Here is full help with updated usage: ZynqMP> help reset reset - Perform RESET of the CPU Usage: reset - cold boot without level specifier reset -w - warm reset if implemented Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io> 
The commit 573a3811edc8 ("sysreset: psci: support system reset in a generic
way with PSCI") has added support for warm reset via PSCI but this hasn't
been reflected in usage message and user has to look at the code how to run
it. That's why update usage text to make this clear.

Here is full help with updated usage:
ZynqMP> help reset
reset - Perform RESET of the CPU

Usage:
reset - cold boot without level specifier
reset -w - warm reset if implemented

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
cmd: pwm: Remove additional pwm description 2021-08-26T06:08:11+00:00 Michal Simek michal.simek@xilinx.com 2021-07-01T09:44:51+00:00 a84d3b6c563445e9626d77f1504b707f054f77cf The first name is taken from command name that's why shouldn't be listed in help. And commands shouldn't be listed with <> which means value but value itself is command name. Also add description for commands to make it clear what it does. Before pwm pwm <invert> <pwm_dev_num> <channel> <polarity> pwm <config> <pwm_dev_num> <channel> <period_ns> <duty_ns> ... After: pwm invert <pwm_dev_num> <channel> <polarity> - invert polarity pwm config <pwm_dev_num> <channel> <period_ns> <duty_ns> - config PWM pwm enable <pwm_dev_num> <channel> - enable PWM output pwm disable <pwm_dev_num> <channel> - disable PWM output Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
The first name is taken from command name that's why shouldn't be listed in
help. And commands shouldn't be listed with <> which means value but value
itself is command name.
Also add description for commands to make it clear what it does.

Before
pwm pwm <invert> <pwm_dev_num> <channel> <polarity>
pwm <config> <pwm_dev_num> <channel> <period_ns> <duty_ns>
...

After:
pwm invert <pwm_dev_num> <channel> <polarity> - invert polarity
pwm config <pwm_dev_num> <channel> <period_ns> <duty_ns> - config PWM
pwm enable <pwm_dev_num> <channel> - enable PWM output
pwm disable <pwm_dev_num> <channel> - disable PWM output

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
cmd: date: rtc: Update command to read the first RTC with seq 0 2021-08-06T07:32:02+00:00 Michal Simek michal.simek@xilinx.com 2021-07-29T10:59:12+00:00 a1ae55ee7f8df911649a0cfa5eba3ea88bae92ab RTCs are using sequence number defined in aliases node. Date command with DM_RTC enabled is looking for the first RTC with index 0. But when RTC_EMULATION is enabled it gets likely most of the time index 0 even when system has rtc0 device via aliases node and gets sequence number 0. That's why extend the code to look for sequence 0 number first. If this fails continue to use existing device with index 0. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
RTCs are using sequence number defined in aliases node. Date command with
DM_RTC enabled is looking for the first RTC with index 0. But when
RTC_EMULATION is enabled it gets likely most of the time index 0 even when
system has rtc0 device via aliases node and gets sequence number 0.
That's why extend the code to look for sequence 0 number first. If this
fails continue to use existing device with index 0.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
pci: Drop old code from pci command 2021-08-05T19:58:48+00:00 Simon Glass sjg@chromium.org 2021-08-02T00:54:14+00:00 86a898f5dec2633bed50380052c7c72c029de936 Drop the pre-driver model code from this file. Signed-off-by: Simon Glass <sjg@chromium.org> 
Drop the pre-driver model code from this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
cmd:(cosmetic)Mentioned in 'chpart' command HELP text that it is for MTD devices 2021-08-04T19:58:31+00:00 Adarsh Babu Kalepalli opensource.kab@gmail.com 2021-05-24T08:05:39+00:00 1fdafebdfc948f87af40980c6c5135afd96ecdf1 Modified the help text of 'chpart' command ,mentioning that it is for MTD devices. Signed-off-by: Adarsh Babu Kalepalli <opensource.kab@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
Modified the help text of 'chpart' command ,mentioning that it is
for MTD devices.

Signed-off-by: Adarsh Babu Kalepalli <opensource.kab@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>