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<title>u-boot.git/common/memsize.c, branch v2026.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2026-05-04T18:58:47Z</updated>
<entry>
<title>common: memsize: fix occasionally failing alias probing</title>
<updated>2026-05-04T18:58:47Z</updated>
<author>
<name>Emanuele Ghidoli</name>
<email>emanuele.ghidoli@toradex.com</email>
</author>
<published>2026-04-29T10:03:56Z</published>
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<id>urn:sha1:2c733e6c85576b86358885c0a9462a0337797653</id>
<content type='text'>
probe_ram_size_by_alias() detects whether a probe address still aliases
a lower address by writing through one address and reading through the
other.

On i.MX95 this occasionally reported a false non-alias when the alias
read happened immediately after the write.

A memory barrier alone, mb(), was tested but did not make the failure go
away. This suggests that ordering the CPU accesses is not sufficient for
this probe, likely because the issue is in the path to the memory
controller rather than in the core itself.

Read the written address back before checking the alias address. This
appears to force the write to become observable at the probe address
before using the alias read to decide whether the tested address range
exists.

If the readback does not match the written pattern, restore the saved
value and continue with the next check. This keeps the probe robust for
addresses that do not reliably retain the test pattern.

Fixes: 0977448b45e2 ("common: memsize: add RAM size probe based on alias detection")
Signed-off-by: Emanuele Ghidoli &lt;emanuele.ghidoli@toradex.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>common: memsize: add RAM size probe based on alias detection</title>
<updated>2026-04-21T23:49:39Z</updated>
<author>
<name>Emanuele Ghidoli</name>
<email>emanuele.ghidoli@toradex.com</email>
</author>
<published>2026-04-17T07:13:31Z</published>
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<id>urn:sha1:0977448b45e2f1a9cbe7d7e11d208b16460c79ea</id>
<content type='text'>
Add probe_ram_size_by_alias() to detect RAM size by checking whether a
write to one address aliases to another address.

Compared to get_ram_size(), this function allows the caller to:
- limit probing to a small set of required accesses
- avoid touching reserved or already used memory regions
- handle non-linear alias patterns

On the iMX95 SoC, when used with LPDDR5, accesses beyond the end of an 8GB DDR
configuration do not alias to the expected linear wrap-around addresses.
Instead, the aliased addresses appear to follow a pattern related to the
DDRC bank and bank-group addresses mapping. Experimentally, the observed
pattern is:

Write        Read
y00000000 -&gt; x0001c000
y00004000 -&gt; x00018000
y00008000 -&gt; x00014000
y0000c000 -&gt; x00010000
y00010000 -&gt; x0000c000
y00014000 -&gt; x00008000
y00018000 -&gt; x00004000
y0001c000 -&gt; x00000000

This helper makes it possible to probe RAM size by explicitly specifying
the probed address and the expected alias address for each size check.

Signed-off-by: Emanuele Ghidoli &lt;emanuele.ghidoli@toradex.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>common/memsize.c: Fix get_ram_size() original data restore</title>
<updated>2026-03-02T14:21:47Z</updated>
<author>
<name>Stefan Eichenberger</name>
<email>stefan.eichenberger@toradex.com</email>
</author>
<published>2025-03-14T10:06:49Z</published>
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<id>urn:sha1:8d24789abed0822fbe41a2f9d72cf19650159dc6</id>
<content type='text'>
The get_ram_size() function fails to restore the original RAM data when
the data cache is enabled. This issue was observed on an AM625 R5 SPL
with 512MB of RAM and is a regression that became visible with
commit bc07851897bd ("board: ti: Pull redundant DDR functions to a common
location and Fixup DDR size when ECC is enabled").

Observed boot failure messages:
  Warning: Did not detect image signing certificate. Skipping authentication to prevent boot failure. This will fail on Security Enforcing(HS-SE) devices
  Authentication passed
  Starting ATF on ARM64 core...

The system then hangs. This indicates that without a data cache flush,
data in the cache is not coherent with RAM, preventing the system from
booting. This was verified by printing the content of this address when
the issue occurs.

Add a data cache flush after each restore operation to resolve this
issue.

Fixes: bc07851897bd ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled")
Fixes: 1c64b98c1ec4 ("common/memsize.c: Fix get_ram_size() when cache is enabled")
Signed-off-by: Stefan Eichenberger &lt;stefan.eichenberger@toradex.com&gt;
Reviewed-by: Emanuele Ghidoli &lt;emanuele.ghidoli@toradex.com&gt;
Tested-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt; # Toradex Verdin AM62
</content>
</entry>
<entry>
<title>cache: Check dcache availability before calling cache functions</title>
<updated>2025-09-30T06:29:55Z</updated>
<author>
<name>Boon Khai Ng</name>
<email>boon.khai.ng@altera.com</email>
</author>
<published>2025-08-14T03:17:40Z</published>
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<id>urn:sha1:38d49808d4cd51e8972bfe7478db03325118d553</id>
<content type='text'>
When the data cache (dcache) is disabled, calling related
status functions can lead to compilation errors due to
undefined references.

Adding a !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) check before
invoking dcache_status() (used in common/memsize.c:get_ram_size())
and mmu_status() (from arch/arm/include/asm/io.h).

Without this check, builds with dcache disabled will fail to compile.

Signed-off-by: Boon Khai Ng &lt;boon.khai.ng@altera.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"</title>
<updated>2024-05-20T19:35:03Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-20T19:35:03Z</published>
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<id>urn:sha1:03de305ec48b0bb28554372abb40ccd46dbe0bf9</id>
<content type='text'>
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""</title>
<updated>2024-05-19T14:16:36Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-19T02:20:43Z</published>
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<id>urn:sha1:d678a59d2d719da9e807495b4b021501f2836ca5</id>
<content type='text'>
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>common: Remove &lt;common.h&gt; and add needed includes</title>
<updated>2024-05-06T21:05:04Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-04-27T14:11:00Z</published>
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<id>urn:sha1:a79fc7a79cc9d4f7a46b19a4891484ac1e9ef599</id>
<content type='text'>
Remove &lt;common.h&gt; from all "commmon/" files and when needed add
missing include files directly.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>common/memsize.c: Fix get_ram_size() when cache is enabled</title>
<updated>2023-06-21T20:54:25Z</updated>
<author>
<name>Emanuele Ghidoli</name>
<email>emanuele.ghidoli@toradex.com</email>
</author>
<published>2023-05-30T13:33:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1c64b98c1ec40d2c9eb68af2d190e989dded8919'/>
<id>urn:sha1:1c64b98c1ec40d2c9eb68af2d190e989dded8919</id>
<content type='text'>
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses
to aliased (not physically present) addresses are cached and
wrong size is returned.

This was discovered while working on a TI AM625 based board
where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3: Enable dcache in SPL").

Signed-off-by: Emanuele Ghidoli &lt;emanuele.ghidoli@toradex.com&gt;
Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'next'</title>
<updated>2023-01-09T16:30:08Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-01-09T16:30:08Z</published>
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<id>urn:sha1:cebdfc22da6eb81793b616e855bc4d6d89c1c7a6</id>
<content type='text'>
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>common/memsize.c: Check for overflow in get_effective_memsize() only for mpc85xx</title>
<updated>2023-01-07T23:01:53Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2023-01-07T21:55:26Z</published>
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<id>urn:sha1:d1f4b090dd17ee11373859f2c91af94bf254af7a</id>
<content type='text'>
This reverts commit 777aaaa706bc ("common/memsize.c: Fix
get_effective_memsize() to check for overflow") for non-mpc85xx platforms.

The changes to this generic function, which is intended to help with
32bit platforms with large amounts of memory has unintended side effects
(which in turn lead to boot failures) on other platforms which were
previously functional.

For now do overflow check only for powerpc mpc85xx platform. It is needed
to prevent crashing of P1/P2 boards with 4GB DDR module in 32-bit mode.

Fixes: 777aaaa706bc ("common/memsize.c: Fix get_effective_memsize() to check for overflow")
Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
</content>
</entry>
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