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<title>u-boot.git/common/spl/Kconfig, branch v2022.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/common/spl/Kconfig?h=v2022.10</id>
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<updated>2022-08-11T10:46:41Z</updated>
<entry>
<title>spl: opensbi: convert scratch options to config</title>
<updated>2022-08-11T10:46:41Z</updated>
<author>
<name>Nikita Shubin</name>
<email>n.shubin@yadro.com</email>
</author>
<published>2022-08-08T10:28:52Z</published>
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<id>urn:sha1:aa0eda17cf98448c3ef826204f38c76bf48b3345</id>
<content type='text'>
Convert hardcoded "opensbi_info.options" to config provided value, this
allows changing options passed to OpenSBI.

SPL_OPENSBI_SCRATCH_OPTIONS is defaulted to SBI_SCRATCH_NO_BOOT_PRINTS.

Link: https://github.com/riscv-software-src/opensbi/blob/master/docs/firmware/fw_dynamic.md
Signed-off-by: Nikita Shubin &lt;n.shubin@yadro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-20220726' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2022-07-26T14:26:00Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-07-26T14:26:00Z</published>
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<id>urn:sha1:86feeab3dc71977afb70f595e42060ce324086d0</id>
<content type='text'>
u-boot-imx-20220726
-------------------

i.MX for 2022.10

- Added i.MX93 architecture

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12891
</content>
</entry>
<entry>
<title>spl: Use SPL_FIT_IMAGE_TINY for iMX9</title>
<updated>2022-07-26T09:29:00Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2022-07-26T08:40:45Z</published>
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<id>urn:sha1:65c56bcaec7e17175d3a5f08f9da0c75b27a1732</id>
<content type='text'>
Select SPL_FIT_IMAGE_TINY for i.MX9

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>spl: imx8mm: enlarge SPL_MAX_SIZE</title>
<updated>2022-07-26T09:28:59Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2022-07-26T08:40:31Z</published>
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<id>urn:sha1:658ff9d035f558676dfcad091fbb985f4d15bad6</id>
<content type='text'>
The CONFIG_SPL_MAX_SIZE could be 0x27000 for i.MX8MM when SPL_TEXT_BASE
set to 0x7E1000.

The DDR firmware max uses 96KB, there is a 4KB padding header before
SPL_TEXT_BASE, so the SPL MAX SIZE is `256KB - 96KB - 4KB`.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
</entry>
<entry>
<title>xilinx: zynqmp: Do not use 0 as spl bss start address</title>
<updated>2022-07-26T06:23:54Z</updated>
<author>
<name>Stefan Herbrechtsmeier</name>
<email>stefan.herbrechtsmeier@weidmueller.com</email>
</author>
<published>2022-07-14T13:47:33Z</published>
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<id>urn:sha1:fcbc43bd508afbb5b7ffa9682dc22e1f5e0912d4</id>
<content type='text'>
Do not use 0 as address for memory because of the special meaning for
pointers (null pointer). Change the spl bss start address to the second
page.

Signed-off-by: Stefan Herbrechtsmeier &lt;stefan.herbrechtsmeier@weidmueller.com&gt;
Link: https://lore.kernel.org/r/20220714134733.7487-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
<entry>
<title>spl: Use SPL_TEXT_BASE instead of ISW_ENTRY_ADDR</title>
<updated>2022-07-25T18:57:27Z</updated>
<author>
<name>Andrew Davis</name>
<email>afd@ti.com</email>
</author>
<published>2022-07-15T17:31:48Z</published>
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<id>urn:sha1:a9ec2f6509f09eacd5094eff176723d4f99a483e</id>
<content type='text'>
The ISW_ENTRY_ADDR symbol was used for OMAP devices in place of
SPL_TEXT_BASE. Keystone2 HS devices were not using it right either.
Remove ISW_ENTRY_ADDR and use SPL_TEXT_BASE directly.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arch: mvebu: Disable by default unused peripherals in SPL</title>
<updated>2022-07-21T08:14:04Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-05-24T08:58:42Z</published>
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<id>urn:sha1:35ed176af24484dbea064266be75aefdc88d79ec</id>
<content type='text'>
SPL on mvebu loads proper U-Boot from custom Marvell kwbimage format and
therefore support for other binary formats is not required to be present in
SPL. Boot source of proper U-Boot is defined by compile time options and
therefore it is not required to enable all possible and unused peripherals
in SPL by default.

This change decrease size of SPL binaries.

Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>spl: allow using nand base without standard nand driver</title>
<updated>2022-07-13T21:03:37Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-05-20T03:23:53Z</published>
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<id>urn:sha1:4c4bf046a528947c843ec703f667cd36b88e315a</id>
<content type='text'>
This patch removes the dependency to SPL_NAND_DRIVERS for SPL_NAND_BASE to
allow minimal spl nand driver to use nand base for probing NAND chips.

Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'dm-pull-28jun22' of https://source.denx.de/u-boot/custodians/u-boot-dm into next</title>
<updated>2022-07-08T18:39:07Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-07-08T18:39:07Z</published>
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<id>urn:sha1:9ff4ce8abc627b8696c9bd6fd726dd1dbf4b9a5c</id>
<content type='text'>
nman external-symbol improvements
Driver model memory-usage reporting
patman test-reporting improvements
Add bloblist design goals
</content>
</entry>
<entry>
<title>spl: Set SPL_MAX_SIZE default for AST2600</title>
<updated>2022-07-06T18:32:00Z</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2022-06-29T07:05:22Z</published>
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<id>urn:sha1:a16175350c3f1706c9bbfd8458c60ea6429034fc</id>
<content type='text'>
The AST2600 bootrom has a max size of 64KB. This can be overridden if the
system is running the SPL from SPI NOR and not using secure boot.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
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