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<title>u-boot.git/common/spl/Makefile, branch v2026.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>spl: Add support for a relocating jump to the next phase</title>
<updated>2025-01-22T15:47:50+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-01-16T01:27:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=20ad3fa0e1af3982ddfe824aae1b8221c1f1fa0c'/>
<id>20ad3fa0e1af3982ddfe824aae1b8221c1f1fa0c</id>
<content type='text'>
When one xPL phase wants to jump to the next, the next phase must be
loaded into its required address. This means that the TEXT_BASE for the
two phases must be different and there cannot be any memory overlap
between the code used by the two phases. It also can mean that phases
need to be moved around to accommodate any size growth.

Having two xPL phases in SRAM at the same time can be tricky if SRAM
is limited, which it often is. It would be better if the second phase
could be loaded somewhere else, then decompressed into place over the
top of the first phase.

Introduce a relocating jump for xPL to support this. This selects a
suitable place to load the (typically compressed) next phase, copies
some decompression code out of the first phase, then jumps to this code
to decompress and start the next phase.

This feature makes it much easier to support Verified Boot for Embedded
(VBE) on RK3399 boards, which have 192KB of SRAM.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
When one xPL phase wants to jump to the next, the next phase must be
loaded into its required address. This means that the TEXT_BASE for the
two phases must be different and there cannot be any memory overlap
between the code used by the two phases. It also can mean that phases
need to be moved around to accommodate any size growth.

Having two xPL phases in SRAM at the same time can be tricky if SRAM
is limited, which it often is. It would be better if the second phase
could be loaded somewhere else, then decompressed into place over the
top of the first phase.

Introduce a relocating jump for xPL to support this. This selects a
suitable place to load the (typically compressed) next phase, copies
some decompression code out of the first phase, then jumps to this code
to decompress and start the next phase.

This feature makes it much easier to support Verified Boot for Embedded
(VBE) on RK3399 boards, which have 192KB of SRAM.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>global: Rename SPL_TPL_ to PHASE_</title>
<updated>2024-10-11T17:44:48+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5c10c8badf8233cac1593cd2bef4d0379ac9e5bd'/>
<id>5c10c8badf8233cac1593cd2bef4d0379ac9e5bd</id>
<content type='text'>
Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.

Update the comment in bootstage to refer to this symbol, instead of
SPL_

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.

Update the comment in bootstage to refer to this symbol, instead of
SPL_

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>global: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD</title>
<updated>2024-10-11T17:44:48+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1d6132e2a2b1217567b88ddd6d11662afd4001df'/>
<id>1d6132e2a2b1217567b88ddd6d11662afd4001df</id>
<content type='text'>
Complete this rename for all directories outside arch/ board/ drivers/
and include/

Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Complete this rename for all directories outside arch/ board/ drivers/
and include/

Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>upl: Add support for Universal Payload in SPL</title>
<updated>2024-08-09T22:03:20+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-08-07T22:47:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fefb53492f729626a515b67b1acca941ad07e974'/>
<id>fefb53492f729626a515b67b1acca941ad07e974</id>
<content type='text'>
Add the basic code to create a handoff structure in SPL, so it can be
passed to the next phase. For now this is not plumbed in.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the basic code to create a handoff structure in SPL, so it can be
passed to the next phase. For now this is not plumbed in.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tree-wide: Replace http:// link with https:// link for ti.com</title>
<updated>2023-11-10T16:01:50+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2023-11-01T20:56:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a94a4071d449e12c9fb5ac37d6362d22efcb27da'/>
<id>a94a4071d449e12c9fb5ac37d6362d22efcb27da</id>
<content type='text'>
Replace instances of http://www.ti.com with https://www.ti.com

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
<content type='xhtml'>
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<pre>
Replace instances of http://www.ti.com with https://www.ti.com

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Move i.MX8 container image loading support to common/spl</title>
<updated>2023-10-18T00:50:52+00:00</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2023-10-14T20:47:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=12b3339070bcab746355647a6aae7498f28c4add'/>
<id>12b3339070bcab746355647a6aae7498f28c4add</id>
<content type='text'>
To facilitate testing loading i.MX8 container images, move the
parse-container code to common/spl.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To facilitate testing loading i.MX8 container images, move the
parse-container code to common/spl.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>common: spl: Add spl NVMe boot support</title>
<updated>2023-06-19T21:47:41+00:00</updated>
<author>
<name>Mayuresh Chitale</name>
<email>mchitale@ventanamicro.com</email>
</author>
<published>2023-06-03T14:02:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=02d9c0b0e5c95b0c8af475c4b8821abe62478419'/>
<id>02d9c0b0e5c95b0c8af475c4b8821abe62478419</id>
<content type='text'>
Add support to load the next stage image from an NVMe disk which may
be formatted as an EXT or FAT filesystem.

Signed-off-by: Mayuresh Chitale &lt;mchitale@ventanamicro.com&gt;
[trini: Drop hunk changing disk/part.c as that breaks other users]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support to load the next stage image from an NVMe disk which may
be formatted as an EXT or FAT filesystem.

Signed-off-by: Mayuresh Chitale &lt;mchitale@ventanamicro.com&gt;
[trini: Drop hunk changing disk/part.c as that breaks other users]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: blk: Support loading images from fs</title>
<updated>2023-06-19T21:19:44+00:00</updated>
<author>
<name>Mayuresh Chitale</name>
<email>mchitale@ventanamicro.com</email>
</author>
<published>2023-06-03T14:02:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8ce6a2e1757718bb9e4e97f1fd7da94ba298fe73'/>
<id>8ce6a2e1757718bb9e4e97f1fd7da94ba298fe73</id>
<content type='text'>
Add a generic API to support loading of SPL payload from any supported
filesystem on a given partition of a block device.

Signed-off-by: Mayuresh Chitale &lt;mchitale@ventanamicro.com&gt;
</content>
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<pre>
Add a generic API to support loading of SPL payload from any supported
filesystem on a given partition of a block device.

Signed-off-by: Mayuresh Chitale &lt;mchitale@ventanamicro.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: Rename Kconfig SPL_LEGACY_IMAGE_SUPPORT to SPL_LEGACY_IMAGE_FORMAT</title>
<updated>2022-05-11T13:22:24+00:00</updated>
<author>
<name>Andrew Davis</name>
<email>afd@ti.com</email>
</author>
<published>2022-05-04T20:52:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6665ab179532932f34162bc62d0240116f2e38ac'/>
<id>6665ab179532932f34162bc62d0240116f2e38ac</id>
<content type='text'>
This matches what this support is called in the non-SPL case. The postfix
_SUPPORT is redundant as enabling Kconfig options implies support.
With this we can use CONFIG_IS_ENABLED() as needed.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
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<pre>
This matches what this support is called in the non-SPL case. The postfix
_SUPPORT is redundant as enabling Kconfig options implies support.
With this we can use CONFIG_IS_ENABLED() as needed.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: Add semihosting boot method</title>
<updated>2022-04-01T19:03:13+00:00</updated>
<author>
<name>Sean Anderson</name>
<email>sean.anderson@seco.com</email>
</author>
<published>2022-03-22T20:59:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8e1c9fe243a31a0b0a40a80cc20fc3c06246d675'/>
<id>8e1c9fe243a31a0b0a40a80cc20fc3c06246d675</id>
<content type='text'>
This adds a boot method for loading the next stage from the host. It is
mostly modeled off of spl_load_image_ext. I am not really sure why/how
spl_load_image_fat uses three different methods to load the image, but
the simple case seems to work OK for now.

To control the presence of this boot method, we add a config symbol.
While we're at it, we update the original semihosting config symbol.

I think semihosting has some advantages of other forms of JTAG boot.
Common other ways to boot from JTAG include:

- Implementing DDR initialization through JTAG (typically with dozens of
  lines of TCL) and then loading U-Boot. The DDR initialization
  typically uses hard-coded register writes, and is not easily adapted
  to different boards. BOOT_DEVICE_SMH allows booting with SPL,
  leveraging U-Boot's existing DDR initialization code. This is the
  method used by NXP's CodeWarrior IDE on Layerscape processors (see
  AN12270).
- Loading a bootloader into SDRAM, waiting for it to initialize DDR, and
  then loading U-Boot. This is tricky, because the debugger must stop the
  boot after the bootloader has completed its work. Trying to load
  U-Boot too early can cause failure to boot. This is the method used by
  Xilinx with its Zynq(MP) processors.
- Loading SPL with BOOT_DEVICE_RAM and breaking before SPL loads the
  image to load U-Boot at the appropriate place. This can be a bit
  tricky, because the load address is dependent on the header size. An
  elf with symbols must also be used in order to stop at the appropriate
  point. BOOT_DEVICE_SMH can be viewed as an extension of this process,
  where SPL automatically stops and tells the host where to place the
  image.

Signed-off-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds a boot method for loading the next stage from the host. It is
mostly modeled off of spl_load_image_ext. I am not really sure why/how
spl_load_image_fat uses three different methods to load the image, but
the simple case seems to work OK for now.

To control the presence of this boot method, we add a config symbol.
While we're at it, we update the original semihosting config symbol.

I think semihosting has some advantages of other forms of JTAG boot.
Common other ways to boot from JTAG include:

- Implementing DDR initialization through JTAG (typically with dozens of
  lines of TCL) and then loading U-Boot. The DDR initialization
  typically uses hard-coded register writes, and is not easily adapted
  to different boards. BOOT_DEVICE_SMH allows booting with SPL,
  leveraging U-Boot's existing DDR initialization code. This is the
  method used by NXP's CodeWarrior IDE on Layerscape processors (see
  AN12270).
- Loading a bootloader into SDRAM, waiting for it to initialize DDR, and
  then loading U-Boot. This is tricky, because the debugger must stop the
  boot after the bootloader has completed its work. Trying to load
  U-Boot too early can cause failure to boot. This is the method used by
  Xilinx with its Zynq(MP) processors.
- Loading SPL with BOOT_DEVICE_RAM and breaking before SPL loads the
  image to load U-Boot at the appropriate place. This can be a bit
  tricky, because the load address is dependent on the header size. An
  elf with symbols must also be used in order to stop at the appropriate
  point. BOOT_DEVICE_SMH can be viewed as an extension of this process,
  where SPL automatically stops and tells the host where to place the
  image.

Signed-off-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
