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<title>u-boot.git/common/spl/spl.c, branch v2017.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>spl: do not repeat timer init on i.MX6</title>
<updated>2017-08-29T07:48:37+00:00</updated>
<author>
<name>Anatolij Gustschin</name>
<email>agust@denx.de</email>
</author>
<published>2017-08-28T15:46:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f9d42d821c49e0a12c77c100857b914717b9bc0a'/>
<id>f9d42d821c49e0a12c77c100857b914717b9bc0a</id>
<content type='text'>
The GPT timer was already initialised in board_init_f() as
it is needed in dram init. Do not repeat timer init in
board_init_r().

Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Acked-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
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<pre>
The GPT timer was already initialised in board_init_f() as
it is needed in dram init. Do not repeat timer init in
board_init_r().

Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Acked-by: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: dm: use CONFIG_IS_ENABLED to test for the DM option</title>
<updated>2017-08-13T15:12:20+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-06-30T17:02:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f1c6e1922eb57f4a212c09709801a1cc7920ffa9'/>
<id>f1c6e1922eb57f4a212c09709801a1cc7920ffa9</id>
<content type='text'>
Even though there's now a TPL_DM configuration option, the spl logic
still checks for SPL_DM and thus does not pick up the proper config
option.

This introduces the use of CONFIG_IS_ENABLED(DM) in spl.c to always
pick up the desired configuration option instead of having a
hard-coded check for the SPL variant.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
Even though there's now a TPL_DM configuration option, the spl logic
still checks for SPL_DM and thus does not pick up the proper config
option.

This introduces the use of CONFIG_IS_ENABLED(DM) in spl.c to always
pick up the desired configuration option instead of having a
hard-coded check for the SPL variant.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: use TPL_SYS_MALLOC_F_LEN for TPL</title>
<updated>2017-08-13T15:12:19+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-07-28T09:06:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ae2cee2e34a9a4b69b7a4dea3dc93c4d93d93b53'/>
<id>ae2cee2e34a9a4b69b7a4dea3dc93c4d93d93b53</id>
<content type='text'>
The (upstream) changes to break up SYS_MALLOC_F_LEN for the full
U-Boot and the SPL stage, break TPL (if simple malloc is enabled in
TPL).

This adds support for a TPL-variant of SYS_MALLOC_F_LEN:
- adds TPL_SYS_MALLOC_F_LEN
- rewrites a test for CONFIG_SPL_SYS_MALLOC_F_LEN to access
  CONFIG_VAL(SYS_MALLOC_F_LEN)

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
The (upstream) changes to break up SYS_MALLOC_F_LEN for the full
U-Boot and the SPL stage, break TPL (if simple malloc is enabled in
TPL).

This adds support for a TPL-variant of SYS_MALLOC_F_LEN:
- adds TPL_SYS_MALLOC_F_LEN
- rewrites a test for CONFIG_SPL_SYS_MALLOC_F_LEN to access
  CONFIG_VAL(SYS_MALLOC_F_LEN)

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: make SPL and normal u-boot stage use independent SYS_MALLOC_F_LEN</title>
<updated>2017-07-27T12:59:03+00:00</updated>
<author>
<name>Andy Yan</name>
<email>andy.yan@rock-chips.com</email>
</author>
<published>2017-07-24T09:43:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f1896c45cb2f7d8dbed27e784a6459a129fc0762'/>
<id>f1896c45cb2f7d8dbed27e784a6459a129fc0762</id>
<content type='text'>
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.

Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
[fixed up commit-message:]
Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
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<pre>
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.

Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
[fixed up commit-message:]
Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: armv7m: to keep ARM v7M in thumb mode before booting next image</title>
<updated>2017-06-09T01:00:27+00:00</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-05-28T19:55:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6bcdd66d1c3766a970e06a61a7233daacb5045db'/>
<id>6bcdd66d1c3766a970e06a61a7233daacb5045db</id>
<content type='text'>
On ARM v7M, the processor will return to ARM mode when executing blx
instruction with bit 0 of the address == 0. Always set it to 1 to stay in thumb
mode.

At present, it is applied only for raw U-Boot. This patch moves it to just
before booting next image. This way armv7m will be in thumb mode for any image
like raw or image with header like zImage or standard U-Boot.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On ARM v7M, the processor will return to ARM mode when executing blx
instruction with bit 0 of the address == 0. Always set it to 1 to stay in thumb
mode.

At present, it is applied only for raw U-Boot. This patch moves it to just
before booting next image. This way armv7m will be in thumb mode for any image
like raw or image with header like zImage or standard U-Boot.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>bootstage: Support SPL</title>
<updated>2017-06-05T18:13:08+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-05-22T11:05:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=824bb1b45371efcb10561456e894d7c2fa1a4b88'/>
<id>824bb1b45371efcb10561456e894d7c2fa1a4b88</id>
<content type='text'>
At present bootstage only supports U-Boot proper. But SPL can also consume
boot time so it is useful to have the record start there.

Add bootstage support to SPL. Also support stashing the timing information
when SPL finishes so that it can be picked up and reported by U-Boot
proper. This provides a full boot time record, excluding only the time
taken by the boot ROM.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
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<pre>
At present bootstage only supports U-Boot proper. But SPL can also consume
boot time so it is useful to have the record start there.

Add bootstage support to SPL. Also support stashing the timing information
when SPL finishes so that it can be picked up and reported by U-Boot
proper. This provides a full boot time record, excluding only the time
taken by the boot ROM.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: add support to booting with ATF</title>
<updated>2017-05-15T14:38:09+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-05-05T03:47:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bcc1726a7bdd910b482528fde2faef21bff3b361'/>
<id>bcc1726a7bdd910b482528fde2faef21bff3b361</id>
<content type='text'>
ATF(ARM Trusted Firmware) is used by ARM arch64 SoCs, find more infomation
about ATF at: https://github.com/ARM-software/arm-trusted-firmware

SPL is considered as BL2 in ATF terminology, it needs to load other parts
of ATF binary like BL31, BL32, SCP-BL30, and BL33(U-Boot). And needs to
prepare the parameter for BL31 which including entry and image information
for all other images. Then the SPL handle PC to BL31 with the parameter,
the BL31 will do the rest of work and at last get into U-Boot(BL33).

This patch needs work with patches from Andre for SPL support multi
binary in FIT.

The entry point of bl31 and bl33 are still using hard code because we
still can not get them from the FIT image information.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Tested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ATF(ARM Trusted Firmware) is used by ARM arch64 SoCs, find more infomation
about ATF at: https://github.com/ARM-software/arm-trusted-firmware

SPL is considered as BL2 in ATF terminology, it needs to load other parts
of ATF binary like BL31, BL32, SCP-BL30, and BL33(U-Boot). And needs to
prepare the parameter for BL31 which including entry and image information
for all other images. Then the SPL handle PC to BL31 with the parameter,
the BL31 will do the rest of work and at last get into U-Boot(BL33).

This patch needs work with patches from Andre for SPL support multi
binary in FIT.

The entry point of bl31 and bl33 are still using hard code because we
still can not get them from the FIT image information.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Tested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot</title>
<updated>2017-05-12T02:21:26+00:00</updated>
<author>
<name>B, Ravi</name>
<email>ravibabu@ti.com</email>
</author>
<published>2017-04-18T11:57:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6e7585bb64b12f632681c80c4b193349e1985d92'/>
<id>6e7585bb64b12f632681c80c4b193349e1985d92</id>
<content type='text'>
In single stage bootmode or falcon boot mode, the SPL shall update the
device tree that we load with the normal fixups done via
arch_fixup_fdt(), when possible (ie we have enough information in this
restricted environment to be able to do that still).  This will include
for example updating them memory nodes.

Signed-off-by: Ravi Babu &lt;ravibabu@ti.com&gt;
[trini: Reword commit message]
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In single stage bootmode or falcon boot mode, the SPL shall update the
device tree that we load with the normal fixups done via
arch_fixup_fdt(), when possible (ie we have enough information in this
restricted environment to be able to do that still).  This will include
for example updating them memory nodes.

Signed-off-by: Ravi Babu &lt;ravibabu@ti.com&gt;
[trini: Reword commit message]
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: reorder the assignment of board info to global data</title>
<updated>2017-05-12T02:03:41+00:00</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2017-04-18T11:57:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=15eb1d43bf470b85e9031c2fce7e0ce7b27dd321'/>
<id>15eb1d43bf470b85e9031c2fce7e0ce7b27dd321</id>
<content type='text'>
Move the assignment of board info to global data a bit early which is
safe,
so that ram details can be used to enable caches.

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Signed-off-by: Ravi Babu &lt;ravibabu@ti.com&gt;
Reviewed-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move the assignment of board info to global data a bit early which is
safe,
so that ram details can be used to enable caches.

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Signed-off-by: Ravi Babu &lt;ravibabu@ti.com&gt;
Reviewed-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: make image arg or fdt blob address reconfigurable</title>
<updated>2017-05-08T15:38:40+00:00</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-04-07T22:38:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5bf5250e9d1555aa388a810213fd85106a60388e'/>
<id>5bf5250e9d1555aa388a810213fd85106a60388e</id>
<content type='text'>
At present fdt blob or argument address being passed to kernel is fixed at
compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from
different media like nand, nor flash are copied to the address pointed
by the macro.
The problem is, it makes args/fdt blob compulsory to copy which is not required
in cases like for NOR Flash. This patch removes this limitation.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
At present fdt blob or argument address being passed to kernel is fixed at
compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from
different media like nand, nor flash are copied to the address pointed
by the macro.
The problem is, it makes args/fdt blob compulsory to copy which is not required
in cases like for NOR Flash. This patch removes this limitation.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
