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<title>u-boot.git/common/spl, branch v2017.03-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>ARM: uniphier: change CONFIG_SPL_PAD_TO to 128KB</title>
<updated>2017-01-29T11:59:08+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2017-01-27T21:53:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c0efc3140e75e3ffd6127a5aec97b75347ec7417'/>
<id>c0efc3140e75e3ffd6127a5aec97b75347ec7417</id>
<content type='text'>
The Boot ROM supports authentication feature to prevent malformed
software from being run on products.  The signature is added at the
tail of the second stage loader (= SPL in U-boot terminology).

The size of the second stage loader was 64KB, and it was consistent
across SoCs.  The situation changed when LD20 SoC appeared; it loads
80KB second stage loader, and it is the only exception.

Currently, CONFIG_SPL_PAD_TO is set to 64KB and U-Boot proper is
loaded from the 64KB offset of non-volatile devices.  This means the
signature of LD20 SoC (located at 80KB offset) corrupts the U-Boot
proper image.

Let's move the U-Boot proper image to 128KB offset.  It uses 48KB
for nothing but padding, and we could actually locate the U-Boot
proper at 80KB offset.  However, the power of 2 generally seems a
better choice for the offset address.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
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<pre>
The Boot ROM supports authentication feature to prevent malformed
software from being run on products.  The signature is added at the
tail of the second stage loader (= SPL in U-boot terminology).

The size of the second stage loader was 64KB, and it was consistent
across SoCs.  The situation changed when LD20 SoC appeared; it loads
80KB second stage loader, and it is the only exception.

Currently, CONFIG_SPL_PAD_TO is set to 64KB and U-Boot proper is
loaded from the 64KB offset of non-volatile devices.  This means the
signature of LD20 SoC (located at 80KB offset) corrupts the U-Boot
proper image.

Let's move the U-Boot proper image to 128KB offset.  It uses 48KB
for nothing but padding, and we could actually locate the U-Boot
proper at 80KB offset.  However, the power of 2 generally seems a
better choice for the offset address.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "armv8: release slave cores from CPU_RELEASE_ADDR"</title>
<updated>2017-01-28T19:04:38+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2017-01-20T09:30:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7b74c4b60bd99dcec214c96d22c74f5ba6d8a29e'/>
<id>7b74c4b60bd99dcec214c96d22c74f5ba6d8a29e</id>
<content type='text'>
This reverts commit 8c36e99f211104fd7dcbf0669a35a47ce5e154f5.

There is misunderstanding in commit 8c36e99f2111 ("armv8: release
slave cores from CPU_RELEASE_ADDR").  How to bring the slave cores
into U-Boot proper is platform-specific.  So, it should be cared
in SoC/board files instead of common/spl/spl.c.  As you see SPL
is the acronym of Secondary Program Loader, there is generally
something that runs before SPL (the First one is usually Boot ROM).

How to wake up slave cores from the Boot ROM is really SoC specific.
So, the intention for the spin table support is to bring the slave
cores into U-Boot proper in an SoC specific manner.  (this must be
done after relocation.  see below.)

If you bring the slaves into SPL, it is SoC own code responsibility
to transfer them to U-Boot proper.  The Spin Table defines the
interface between a boot-loader and Linux kernel.  It is unrelated
to the interface between SPL and U-Boot proper.

One more thing is missing in the commit; spl_image-&gt;entry_point
points to the entry address of U-Boot *before* relocation.  U-Boot
relocates itself between board_init_f() and board_init_r().  This
means the master CPU sees the different copy of the spin code than
the slave CPUs enter.  The spin_table_update_dt() protects the code
*after* relocation.  As a result, the slave CPUs spin in unprotected
code, which leads to unstable behavior.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This reverts commit 8c36e99f211104fd7dcbf0669a35a47ce5e154f5.

There is misunderstanding in commit 8c36e99f2111 ("armv8: release
slave cores from CPU_RELEASE_ADDR").  How to bring the slave cores
into U-Boot proper is platform-specific.  So, it should be cared
in SoC/board files instead of common/spl/spl.c.  As you see SPL
is the acronym of Secondary Program Loader, there is generally
something that runs before SPL (the First one is usually Boot ROM).

How to wake up slave cores from the Boot ROM is really SoC specific.
So, the intention for the spin table support is to bring the slave
cores into U-Boot proper in an SoC specific manner.  (this must be
done after relocation.  see below.)

If you bring the slaves into SPL, it is SoC own code responsibility
to transfer them to U-Boot proper.  The Spin Table defines the
interface between a boot-loader and Linux kernel.  It is unrelated
to the interface between SPL and U-Boot proper.

One more thing is missing in the commit; spl_image-&gt;entry_point
points to the entry address of U-Boot *before* relocation.  U-Boot
relocates itself between board_init_f() and board_init_r().  This
means the master CPU sees the different copy of the spin code than
the slave CPUs enter.  The spin_table_update_dt() protects the code
*after* relocation.  As a result, the slave CPUs spin in unprotected
code, which leads to unstable behavior.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: Remove overwrite of relocated malloc limit</title>
<updated>2017-01-28T19:04:34+00:00</updated>
<author>
<name>Andrew F. Davis</name>
<email>afd@ti.com</email>
</author>
<published>2017-01-27T16:39:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b3d2861eb20a795b99292b823c923935df26dfc6'/>
<id>b3d2861eb20a795b99292b823c923935df26dfc6</id>
<content type='text'>
spl_init on some boards is called after stack and heap relocation, on
some platforms spl_relocate_stack_gd is called to handle setting the
limit to its value CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN when simple
SPL malloc is enabled during relocation. spl_init should then not
re-assign the old pre-relocation limit when this is defined.

Signed-off-by: Andrew F. Davis &lt;afd@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
spl_init on some boards is called after stack and heap relocation, on
some platforms spl_relocate_stack_gd is called to handle setting the
limit to its value CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN when simple
SPL malloc is enabled during relocation. spl_init should then not
re-assign the old pre-relocation limit when this is defined.

Signed-off-by: Andrew F. Davis &lt;afd@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: Add some missing newlines</title>
<updated>2017-01-20T20:38:00+00:00</updated>
<author>
<name>Andrew F. Davis</name>
<email>afd@ti.com</email>
</author>
<published>2017-01-12T16:19:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cf947da19aecd1b430f22d73ad109af64a6051b5'/>
<id>cf947da19aecd1b430f22d73ad109af64a6051b5</id>
<content type='text'>
Signed-off-by: Andrew F. Davis &lt;afd@ti.com&gt;
Acked-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Acked-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
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<pre>
Signed-off-by: Andrew F. Davis &lt;afd@ti.com&gt;
Acked-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Acked-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: Remove inline ifdef check for EXT and FAT support</title>
<updated>2017-01-20T20:37:59+00:00</updated>
<author>
<name>Andrew F. Davis</name>
<email>afd@ti.com</email>
</author>
<published>2017-01-06T19:35:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5d28b930f237540382a111b6b990a1738b2f3483'/>
<id>5d28b930f237540382a111b6b990a1738b2f3483</id>
<content type='text'>
These files are only included for build by the make system
when CONFIG_SPL_{EXT,FAT}_SUPPORT is enabled, remove the unneed
checks for these in the source files.

Signed-off-by: Andrew F. Davis &lt;afd@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
These files are only included for build by the make system
when CONFIG_SPL_{EXT,FAT}_SUPPORT is enabled, remove the unneed
checks for these in the source files.

Signed-off-by: Andrew F. Davis &lt;afd@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>armv8: release slave cores from CPU_RELEASE_ADDR</title>
<updated>2017-01-14T21:47:10+00:00</updated>
<author>
<name>Oded Gabbay</name>
<email>oded.gabbay@gmail.com</email>
</author>
<published>2016-12-28T11:38:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8c36e99f211104fd7dcbf0669a35a47ce5e154f5'/>
<id>8c36e99f211104fd7dcbf0669a35a47ce5e154f5</id>
<content type='text'>
When using ARMv8 with ARMV8_SPIN_TABLE=y, we want the slave cores to
wait on spin_table_cpu_release_addr, until the Linux kernel will "wake" them
by writing to that location. The address of spin_table_cpu_release_addr is
transferred to the kernel using the device tree that is updated by
spin_table_update_dt().

However, if we also use SPL, then the slave cores are stuck at
CPU_RELEASE_ADDR instead and as a result, never wake up.

This patch releases the slave cores by writing spl_image-&gt;entry_point to
CPU_RELEASE_ADDR location before the end of the SPL code
(at jump_to_image_no_args()).

That way, the slave cores will start to execute the u-boot and will get to
the spin-table code and wait on the correct address
(spin_table_cpu_release_addr).

Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
When using ARMv8 with ARMV8_SPIN_TABLE=y, we want the slave cores to
wait on spin_table_cpu_release_addr, until the Linux kernel will "wake" them
by writing to that location. The address of spin_table_cpu_release_addr is
transferred to the kernel using the device tree that is updated by
spin_table_update_dt().

However, if we also use SPL, then the slave cores are stuck at
CPU_RELEASE_ADDR instead and as a result, never wake up.

This patch releases the slave cores by writing spl_image-&gt;entry_point to
CPU_RELEASE_ADDR location before the end of the SPL code
(at jump_to_image_no_args()).

That way, the slave cores will start to execute the u-boot and will get to
the spin-table code and wait on the correct address
(spin_table_cpu_release_addr).

Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: move RAM boot support in separate file</title>
<updated>2017-01-14T21:46:26+00:00</updated>
<author>
<name>Stefan Agner</name>
<email>stefan.agner@toradex.com</email>
</author>
<published>2016-12-23T06:51:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=22802f4e3a0a8ead928a0af06b7719b604a98afb'/>
<id>22802f4e3a0a8ead928a0af06b7719b604a98afb</id>
<content type='text'>
Add a new top-level config option so support booting an image stored
in RAM. This allows to move the RAM boot support into a sparate file
and having a single condition to compile that file.

Signed-off-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
</content>
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<pre>
Add a new top-level config option so support booting an image stored
in RAM. This allows to move the RAM boot support into a sparate file
and having a single condition to compile that file.

Signed-off-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Convert CONFIG_SPL_RAM_DEVICE to defconfig</title>
<updated>2017-01-14T21:46:26+00:00</updated>
<author>
<name>Stefan Agner</name>
<email>stefan.agner@toradex.com</email>
</author>
<published>2016-12-23T06:51:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f417d40fe2f0663c5e98b1e123f6fb982b424450'/>
<id>f417d40fe2f0663c5e98b1e123f6fb982b424450</id>
<content type='text'>
This converts the following to Kconfig:
  CONFIG_SPL_RAM_DEVICE

Signed-off-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
</content>
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<pre>
This converts the following to Kconfig:
  CONFIG_SPL_RAM_DEVICE

Signed-off-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Kconfig: CONFIG_OF_PLATDATA doesn't really exist</title>
<updated>2017-01-14T17:20:23+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-01-14T17:20:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7f73ca484f792a0d2a7ee09860c32f3d02b3030d'/>
<id>7f73ca484f792a0d2a7ee09860c32f3d02b3030d</id>
<content type='text'>
There is no CONFIG_OF_PLATDATA, only CONFIG_SPL_OF_PLATDATA, so rename
the two references to CONFIG_OF_PLATDATA to CONFIG_SPL_OF_PLATDATA.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is no CONFIG_OF_PLATDATA, only CONFIG_SPL_OF_PLATDATA, so rename
the two references to CONFIG_OF_PLATDATA to CONFIG_SPL_OF_PLATDATA.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>SPL: make struct spl_image 64-bit safe</title>
<updated>2017-01-04T15:37:41+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2017-01-02T11:48:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=11e1479b9e672661fcc2ea69f7e9cbaa6f07ecf5'/>
<id>11e1479b9e672661fcc2ea69f7e9cbaa6f07ecf5</id>
<content type='text'>
Since entry_point and load_addr are addresses, they should be
represented as longs to cover the whole address space and to avoid
warning when compiling the SPL in 64-bit.
Also adjust debug prints to add the 'l' specifier, where needed.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Since entry_point and load_addr are addresses, they should be
represented as longs to cover the whole address space and to avoid
warning when compiling the SPL in 64-bit.
Also adjust debug prints to add the 'l' specifier, where needed.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
