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<title>u-boot.git/common/spl, branch v2020.01-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Merge tag 'u-boot-rockchip-20191110' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip</title>
<updated>2019-11-11T19:19:32+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-11-11T19:19:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=086e391bc46d3dda5c44053532bb51dc3827ee94'/>
<id>086e391bc46d3dda5c44053532bb51dc3827ee94</id>
<content type='text'>
- Add support for rockchip pmic rk805,rk809, rk816, rk817
- Add rk3399 board Leez support
- Fix bug in rk3328 ram driver
- Adapt SPL to support ATF bl31 with entry at 0x40000
- Fix the u8 type comparision with '-1'.
- Fix checkpatch warning for multi blank line and review signature.
</content>
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<pre>
- Add support for rockchip pmic rk805,rk809, rk816, rk817
- Add rk3399 board Leez support
- Fix bug in rk3328 ram driver
- Adapt SPL to support ATF bl31 with entry at 0x40000
- Fix the u8 type comparision with '-1'.
- Fix checkpatch warning for multi blank line and review signature.
</pre>
</div>
</content>
</entry>
<entry>
<title>common: spl: atf: support booting bl32 image</title>
<updated>2019-11-10T12:40:20+00:00</updated>
<author>
<name>Joseph Chen</name>
<email>chenjh@rock-chips.com</email>
</author>
<published>2019-10-06T18:10:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=474197812d1ef924f120ae360d1a7355ebb646ef'/>
<id>474197812d1ef924f120ae360d1a7355ebb646ef</id>
<content type='text'>
Trusted-Firmware can also initialize a secure payload to use as a trusted
execution environment. In general for the arm64 case this is provided as
separate image and uboot is supposed to also place it in a predetermined
location in memory and add the necessary parameters to the ATF boot params.

So add the possibility to get this tee payload from the provided FIT image
and setup things as necessary.

Tested on a Rockchip PX30 with mainline TF-A, mainline OP-Tee (with pending
PX30 support) and mainline 5.4-rc1 Linux kernel.

Signed-off-by: Joseph Chen &lt;chenjh@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
Trusted-Firmware can also initialize a secure payload to use as a trusted
execution environment. In general for the arm64 case this is provided as
separate image and uboot is supposed to also place it in a predetermined
location in memory and add the necessary parameters to the ATF boot params.

So add the possibility to get this tee payload from the provided FIT image
and setup things as necessary.

Tested on a Rockchip PX30 with mainline TF-A, mainline OP-Tee (with pending
PX30 support) and mainline 5.4-rc1 Linux kernel.

Signed-off-by: Joseph Chen &lt;chenjh@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: fix SPI config dependencies</title>
<updated>2019-11-07T23:01:13+00:00</updated>
<author>
<name>Simon Goldschmidt</name>
<email>simon.k.r.goldschmidt@gmail.com</email>
</author>
<published>2019-10-25T14:22:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d024e992b3f88745ca80ce81055974c9bf2134d4'/>
<id>d024e992b3f88745ca80ce81055974c9bf2134d4</id>
<content type='text'>
As SPL_SPI_FLASH_SUPPORT cannot work without SPL_SPI_SUPPORT, fix
dependencies to prevent enabling SPI flash support without basic SPI
support.

Signed-off-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
Reviewed-by: Lukasz Majewski &lt;lukma@denx.de&gt;
</content>
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<pre>
As SPL_SPI_FLASH_SUPPORT cannot work without SPL_SPI_SUPPORT, fix
dependencies to prevent enabling SPI flash support without basic SPI
support.

Signed-off-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
Reviewed-by: Lukasz Majewski &lt;lukma@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-20191104' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2019-11-04T17:57:41+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-11-04T17:57:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=73b6e6ad254b36763419cdd3fdf406c0094517b7'/>
<id>73b6e6ad254b36763419cdd3fdf406c0094517b7</id>
<content type='text'>
u-boot-imx-20191104
-------------------

- i.MX NAND: nandbcb support for MX6UL / i.MX7
- i.MX8: support for HAB
- Convert to DM (opos6ul, mccmon6)
- Toradex i.MX6ull colibri
- sync DTS with kernel

Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
</content>
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<pre>
u-boot-imx-20191104
-------------------

- i.MX NAND: nandbcb support for MX6UL / i.MX7
- i.MX8: support for HAB
- Convert to DM (opos6ul, mccmon6)
- Toradex i.MX6ull colibri
- sync DTS with kernel

Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: nor: Provide falcon boot support for NOR memories</title>
<updated>2019-11-03T16:04:16+00:00</updated>
<author>
<name>Lukasz Majewski</name>
<email>lukma@denx.de</email>
</author>
<published>2019-10-15T08:28:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a4a16c9181a80d8473f71648b6d3a02fc57c9709'/>
<id>a4a16c9181a80d8473f71648b6d3a02fc57c9709</id>
<content type='text'>
This commit adds falcon boot support (by also copying args necessary for
booting) to the SPL NOR memory driver.

After this change it is possible to use the falcon boot in the same way
as on NAND memories. The necessary configs (i.e. CONFIG_CMD_SPL_NOR_OFS)
are now defined in Kconfig.

Signed-off-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
This commit adds falcon boot support (by also copying args necessary for
booting) to the SPL NOR memory driver.

After this change it is possible to use the falcon boot in the same way
as on NAND memories. The necessary configs (i.e. CONFIG_CMD_SPL_NOR_OFS)
are now defined in Kconfig.

Signed-off-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: Add a size check for TPL</title>
<updated>2019-11-02T23:20:27+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-10-21T03:31:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c52b5e8e2ce7f4cd3a9116083debd27ef23046d7'/>
<id>c52b5e8e2ce7f4cd3a9116083debd27ef23046d7</id>
<content type='text'>
We have the ability to enforce a maximum size for SPL but not yet for TPL.
Add a new option for this.

Document the size check macro while we are here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
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<pre>
We have the ability to enforce a maximum size for SPL but not yet for TPL.
Add a new option for this.

Document the size check macro while we are here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'dm-pull-29oct19' of git://git.denx.de/u-boot-dm</title>
<updated>2019-11-01T13:34:35+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-11-01T13:34:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bb1bb4bb5df9df4d3f07e39a632daaff79e4b77e'/>
<id>bb1bb4bb5df9df4d3f07e39a632daaff79e4b77e</id>
<content type='text'>
- Fix for patman with email addresses containing commas
- Bootstage improvements for TPL, SPL
- Various sandbox and dm improvements and fixes
</content>
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<pre>
- Fix for patman with email addresses containing commas
- Bootstage improvements for TPL, SPL
- Various sandbox and dm improvements and fixes
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: spl_mmc: fix getting raw_sect when boot from emmc boot partition</title>
<updated>2019-10-29T02:09:44+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2019-10-23T01:43:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a335f80502131e9e2b58a0281f5fc78018295ea4'/>
<id>a335f80502131e9e2b58a0281f5fc78018295ea4</id>
<content type='text'>
On i.MX8, when booting from eMMC boot partition, the whole flash.bin
is stored in boot partition, however SPL switches to user partition
during the init of mmc driver:
  spl_mmc_load() -&gt; mmc_init()

Then it tries to load the container image in
spl_mmc_get_uboot_raw_sector(), but here it reads the data from user
partition and the header is not recognized as a valid header.

So we move spl_mmc_get_uboot_raw_sector after eMMC partition switch
to address this issue.

Anyway put spl_mmc_get_uboot_raw_sector before eMMC partition switch
is not correct, so let's move it after eMMC partition switch.

Reported-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
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<pre>
On i.MX8, when booting from eMMC boot partition, the whole flash.bin
is stored in boot partition, however SPL switches to user partition
during the init of mmc driver:
  spl_mmc_load() -&gt; mmc_init()

Then it tries to load the container image in
spl_mmc_get_uboot_raw_sector(), but here it reads the data from user
partition and the header is not recognized as a valid header.

So we move spl_mmc_get_uboot_raw_sector after eMMC partition switch
to address this issue.

Anyway put spl_mmc_get_uboot_raw_sector before eMMC partition switch
is not correct, so let's move it after eMMC partition switch.

Reported-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>bootstage: Allow SPL to obtain bootstage info from TPL</title>
<updated>2019-10-27T16:56:51+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-10-21T23:26:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=31f9f0ea571c12e914eda400b242d4a0a4b39f43'/>
<id>31f9f0ea571c12e914eda400b242d4a0a4b39f43</id>
<content type='text'>
It is possible to enable bootstage in TPL. TPL can stash the info for SPL.
But at present this information is then lost because SPL does not read
from the stash.

Add support for SPL not being the first phase to enable bootstage.
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
It is possible to enable bootstage in TPL. TPL can stash the info for SPL.
But at present this information is then lost because SPL does not read
from the stash.

Add support for SPL not being the first phase to enable bootstage.
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>bootstage: Mark the start/end of TPL and SPL separately</title>
<updated>2019-10-27T16:56:51+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-10-21T23:26:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5256beecb8a14efba805a2f3f14afb33752ac71a'/>
<id>5256beecb8a14efba805a2f3f14afb33752ac71a</id>
<content type='text'>
At present bootstage in TPL and SPL use the same ID so it is not possible
to see the timing of each. Separate out the IDs and use the correct one
depending on which phase we are at.

Example output:

Timer summary in microseconds (14 records):
       Mark    Elapsed  Stage
          0          0  reset
    224,787    224,787  TPL
    282,248     57,461  end TPL
    341,067     58,819  SPL
    925,436    584,369  end SPL
    931,710      6,274  board_init_f
  1,035,482    103,772  board_init_r
  1,387,852    352,370  main_loop
  1,387,911         59  id=175

Accumulated time:
                   196  dm_r
                 8,300  dm_spl
                14,139  dm_f
               229,121  fsp-m
               262,992  fsp-s

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
At present bootstage in TPL and SPL use the same ID so it is not possible
to see the timing of each. Separate out the IDs and use the correct one
depending on which phase we are at.

Example output:

Timer summary in microseconds (14 records):
       Mark    Elapsed  Stage
          0          0  reset
    224,787    224,787  TPL
    282,248     57,461  end TPL
    341,067     58,819  SPL
    925,436    584,369  end SPL
    931,710      6,274  board_init_f
  1,035,482    103,772  board_init_r
  1,387,852    352,370  main_loop
  1,387,911         59  id=175

Accumulated time:
                   196  dm_r
                 8,300  dm_spl
                14,139  dm_f
               229,121  fsp-m
               262,992  fsp-s

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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