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<title>u-boot.git/common/spl, branch v2025.07-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>rockchip: Add SPL_PAD_TO Kconfig default value</title>
<updated>2025-05-06T07:58:25+00:00</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-04-13T19:59:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ce0dccf4593d2eefcb6b0c3145a2f0dd7490d900'/>
<id>ce0dccf4593d2eefcb6b0c3145a2f0dd7490d900</id>
<content type='text'>
Almost all Rockchip boards use the same Kconfig value for SPL_PAD_TO,
0x7f8000.

u-boot-rockchip.bin is typically written to offset 64S (32KiB) of MMC
media. u-boot.itb (or u-boot.img) is typically expected at offset 16384S
(8MiB) of MMC media (SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000).

SPL_PAD_TO is used as the offset for u-boot.itb (or u-boot.img) in the
generated simple-bin binman image, and can be calculated as:

  SPL_PAD_TO = (16384S - 64S) * 512 = 0x7f8000

Add this value as a default value for ARCH_ROCKCHIP.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
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<pre>
Almost all Rockchip boards use the same Kconfig value for SPL_PAD_TO,
0x7f8000.

u-boot-rockchip.bin is typically written to offset 64S (32KiB) of MMC
media. u-boot.itb (or u-boot.img) is typically expected at offset 16384S
(8MiB) of MMC media (SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000).

SPL_PAD_TO is used as the offset for u-boot.itb (or u-boot.img) in the
generated simple-bin binman image, and can be calculated as:

  SPL_PAD_TO = (16384S - 64S) * 512 = 0x7f8000

Add this value as a default value for ARCH_ROCKCHIP.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: imx: use trampoline buffer to load images to secure region</title>
<updated>2025-05-03T19:55:32+00:00</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2025-04-28T10:37:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2f8b24d5cc34e5c4c466a29539e5a01b14423cac'/>
<id>2f8b24d5cc34e5c4c466a29539e5a01b14423cac</id>
<content type='text'>
When SPL loading image to secure region, for example, ATF and tee to
DDR secure region. Because the USDHC controller is non-secure master,
it can't access this region and will cause loading issue.

So use a trampoline buffer in non-secure region, then use CPU to copy the
image from trampoline buffer to destination secure region.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
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<pre>
When SPL loading image to secure region, for example, ATF and tee to
DDR secure region. Because the USDHC controller is non-secure master,
it can't access this region and will cause loading issue.

So use a trampoline buffer in non-secure region, then use CPU to copy the
image from trampoline buffer to destination secure region.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>configs: set SPL_TEXT_BASE by default for k3 platforms</title>
<updated>2025-04-24T14:23:07+00:00</updated>
<author>
<name>Anshul Dalal</name>
<email>anshuld@ti.com</email>
</author>
<published>2025-04-15T09:50:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7d8c3fa26c954f575842d739b4e0b9def4eefae6'/>
<id>7d8c3fa26c954f575842d739b4e0b9def4eefae6</id>
<content type='text'>
SPL_TEXT_BASE is used as the load address for the main domain SPL on k3
platforms.

Since the config value is the same for every board, this patch sets the
value 0x80080000 as default for all 64-bit ARCH_K3, 0x43c00000 as
default for the R5 cores and deletes the instances of SPL_TEXT_BASE in
individual defconfigs.

Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
SPL_TEXT_BASE is used as the load address for the main domain SPL on k3
platforms.

Since the config value is the same for every board, this patch sets the
value 0x80080000 as default for all 64-bit ARCH_K3, 0x43c00000 as
default for the R5 cores and deletes the instances of SPL_TEXT_BASE in
individual defconfigs.

Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: mvebu: Correct SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR usage</title>
<updated>2025-04-16T06:05:15+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-03-15T01:29:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9af45190d6dbe4d7369c01c34b6fe40dc00d8663'/>
<id>9af45190d6dbe4d7369c01c34b6fe40dc00d8663</id>
<content type='text'>
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. However, it also works as intended
because SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is the default option
within that choice statement. To guard against future regressions, make
the choice statement in common/spl/Kconfig have an explicit default if
MVEBU_SPL_BOOT_DEVICE_MMC.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. However, it also works as intended
because SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is the default option
within that choice statement. To guard against future regressions, make
the choice statement in common/spl/Kconfig have an explicit default if
MVEBU_SPL_BOOT_DEVICE_MMC.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge patch series "Annotate switch/case fallthrough cases"</title>
<updated>2025-04-08T22:24:12+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-08T22:24:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1f0281294d8bb1857076d27fd491c70c9808e474'/>
<id>1f0281294d8bb1857076d27fd491c70c9808e474</id>
<content type='text'>
Andre Przywara &lt;andre.przywara@arm.com&gt; says:

C's implicit fallthrough behaviour in switch/case statements can lead to
subtle bugs. Quite some while ago many compilers introduced warnings in
those cases, requiring intentional fallthrough's to be annotated.

So far we were not enabling that compiler option, so many ambiguities
and some bugs in the code went unnoticed.

This series adds the required annotations in code paths that the first
stage of the U-Boot CI covers. There is a large number of cases left
in the libbz2 code. The usage of switch/case is borderline insane there,
labels are hidden in macros, and there are no breaks, but just goto's.
Upstream still uses very similar code, without any annotations. I still
am not 100% sure those are meant to fall through or not, and plan to do
further investigations, but didn't want to hold the rest of the patches
back. You can see for yourself by applying patch 18/18 and building for
sandbox64, for instance.

Because of this we cannot quite enable the warning in the Makefile yet,
but those fixes are worth regardless, and be it to increase readability.

Please note that those patches do not fix anything, really, they just add
those fallthrough annotations, so the series is not really critical.

Link: https://lore.kernel.org/r/20250327153313.2105227-1-andre.przywara@arm.com
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<pre>
Andre Przywara &lt;andre.przywara@arm.com&gt; says:

C's implicit fallthrough behaviour in switch/case statements can lead to
subtle bugs. Quite some while ago many compilers introduced warnings in
those cases, requiring intentional fallthrough's to be annotated.

So far we were not enabling that compiler option, so many ambiguities
and some bugs in the code went unnoticed.

This series adds the required annotations in code paths that the first
stage of the U-Boot CI covers. There is a large number of cases left
in the libbz2 code. The usage of switch/case is borderline insane there,
labels are hidden in macros, and there are no breaks, but just goto's.
Upstream still uses very similar code, without any annotations. I still
am not 100% sure those are meant to fall through or not, and plan to do
further investigations, but didn't want to hold the rest of the patches
back. You can see for yourself by applying patch 18/18 and building for
sandbox64, for instance.

Because of this we cannot quite enable the warning in the Makefile yet,
but those fixes are worth regardless, and be it to increase readability.

Please note that those patches do not fix anything, really, they just add
those fallthrough annotations, so the series is not really critical.

Link: https://lore.kernel.org/r/20250327153313.2105227-1-andre.przywara@arm.com
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: mmc: properly annotate fallthrough</title>
<updated>2025-04-08T22:23:51+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2025-03-27T15:32:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a6a9d3273346138fadb1a173fc2f5e9d0e61215a'/>
<id>a6a9d3273346138fadb1a173fc2f5e9d0e61215a</id>
<content type='text'>
Depending on the various MMC boot configurations, we might end up with
trying filesystem mode when a raw image boot failed. This fall-through
in the switch/case statement is explained in a comment, but this is not
visible to the compiler, which still will complain.

Add the proper compiler-visible annotation, to allow enabling the
compiler check in the future.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
Depending on the various MMC boot configurations, we might end up with
trying filesystem mode when a raw image boot failed. This fall-through
in the switch/case statement is explained in a comment, but this is not
visible to the compiler, which still will complain.

Add the proper compiler-visible annotation, to allow enabling the
compiler check in the future.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge patch series "Various toolchain compatibility fixes/improvements"</title>
<updated>2025-04-02T20:34:08+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-02T20:34:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8b0fe584ae91b588227d69eb7572f72d8b86a83c'/>
<id>8b0fe584ae91b588227d69eb7572f72d8b86a83c</id>
<content type='text'>
Sam Edwards &lt;cfsworks@gmail.com&gt; says:

This is v2 of my "misc. fixes" series, sent to prepare the codebase for more
direct LLVM support in the near future. This series contains several fixes that
I found in the process of preparing that support and which address issues
independent of any future feature or enhancement. I am sending these now, both
so that their inclusion is not delayed by discussion on my upcoming series and
to make the latter more manageable.

Link: https://lore.kernel.org/r/20250315221813.1265193-1-CFSworks@gmail.com
</content>
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<pre>
Sam Edwards &lt;cfsworks@gmail.com&gt; says:

This is v2 of my "misc. fixes" series, sent to prepare the codebase for more
direct LLVM support in the near future. This series contains several fixes that
I found in the process of preparing that support and which address issues
independent of any future feature or enhancement. I am sending these now, both
so that their inclusion is not delayed by discussion on my upcoming series and
to make the latter more manageable.

Link: https://lore.kernel.org/r/20250315221813.1265193-1-CFSworks@gmail.com
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: Align FDT load address</title>
<updated>2025-04-02T20:33:50+00:00</updated>
<author>
<name>Sam Edwards</name>
<email>cfsworks@gmail.com</email>
</author>
<published>2025-03-15T22:18:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=358d1cc232c30091767ce192e74169e7861ae58a'/>
<id>358d1cc232c30091767ce192e74169e7861ae58a</id>
<content type='text'>
While the image size is generally a multiple of 8 bytes, this is not
actually guaranteed; some linkers (like LLD) will shave a few bytes off
of the end of output sections if there are no content bytes there. Since
libfdt imposes a hard rule of 8-byte alignment, make the SPL also be
explicit about the alignment when loading the FDT.

Signed-off-by: Sam Edwards &lt;CFSworks@gmail.com&gt;
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<pre>
While the image size is generally a multiple of 8 bytes, this is not
actually guaranteed; some linkers (like LLD) will shave a few bytes off
of the end of output sections if there are no content bytes there. Since
libfdt imposes a hard rule of 8-byte alignment, make the SPL also be
explicit about the alignment when loading the FDT.

Signed-off-by: Sam Edwards &lt;CFSworks@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: riscv: opensbi: Error on misaligned FDT</title>
<updated>2025-04-02T20:33:50+00:00</updated>
<author>
<name>Sam Edwards</name>
<email>cfsworks@gmail.com</email>
</author>
<published>2025-03-15T22:18:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=17d830cb4b6cdbac56d41938d455820fd7a96a89'/>
<id>17d830cb4b6cdbac56d41938d455820fd7a96a89</id>
<content type='text'>
libfdt 1.6.1+ requires the FDT to be 8-byte aligned and returns an error
if not. OpenSBI 1.0+ includes this version of libfdt and will also
reject misaligned FDTs.

However, OpenSBI cannot indicate the error to the user: since it cannot
access the serial console, it can only silently hang. This proved very
difficult to diagnose without proper debugging facilities. Therefore,
give the U-Boot SPL, which *can* print error messages, an additional
check for proper FDT alignment. Hopefully this saves a lot of
development cycles if another developer encounters alignment problems.

Signed-off-by: Sam Edwards &lt;CFSworks@gmail.com&gt;
</content>
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<pre>
libfdt 1.6.1+ requires the FDT to be 8-byte aligned and returns an error
if not. OpenSBI 1.0+ includes this version of libfdt and will also
reject misaligned FDTs.

However, OpenSBI cannot indicate the error to the user: since it cannot
access the serial console, it can only silently hang. This proved very
difficult to diagnose without proper debugging facilities. Therefore,
give the U-Boot SPL, which *can* print error messages, an additional
check for proper FDT alignment. Hopefully this saves a lot of
development cycles if another developer encounters alignment problems.

Signed-off-by: Sam Edwards &lt;CFSworks@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: return header size to spl_load in os boot</title>
<updated>2025-03-30T15:15:34+00:00</updated>
<author>
<name>Anshul Dalal</name>
<email>anshuld@ti.com</email>
</author>
<published>2025-03-11T09:35:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fd2bccec19d399b4a445009b3d514d2419cfbc95'/>
<id>fd2bccec19d399b4a445009b3d514d2419cfbc95</id>
<content type='text'>
During linux build process the header size is computed including the BSS
whereas it's removed when creating the uncompressed image. Therefore the
size of the uncompressed image on filesystem will be smaller than the
size specified in the header.

This causes issues when loading the kernel image from the SPL (as in
falcon boot) with spl_load since it compares the read file size from the
FS to the header size form the image. Which leads to the following check
in `include/spl_load.h` failing to -EIO when loading kernel image:

  return read &lt; spl_image-&gt;size ? -EIO : 0;

Therefore we should return the header size back to spl_load instead of
the file size in falcon boot when not loading a FIT image.

Bug report:
https://lore.kernel.org/u-boot/20250214111656.2358748-1-anshuld@ti.com/

Fixes: 775074165d97 ("spl: Add generic spl_load function")
Reported-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
</content>
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<pre>
During linux build process the header size is computed including the BSS
whereas it's removed when creating the uncompressed image. Therefore the
size of the uncompressed image on filesystem will be smaller than the
size specified in the header.

This causes issues when loading the kernel image from the SPL (as in
falcon boot) with spl_load since it compares the read file size from the
FS to the header size form the image. Which leads to the following check
in `include/spl_load.h` failing to -EIO when loading kernel image:

  return read &lt; spl_image-&gt;size ? -EIO : 0;

Therefore we should return the header size back to spl_load instead of
the file size in falcon boot when not loading a FIT image.

Bug report:
https://lore.kernel.org/u-boot/20250214111656.2358748-1-anshuld@ti.com/

Fixes: 775074165d97 ("spl: Add generic spl_load function")
Reported-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
</pre>
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</content>
</entry>
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