u-boot.git/common/virtex2.c, branch master Unnamed repository; edit this file 'description' to name the repository. FPGA: move fpga drivers to drivers/fpga 2008-12-05T21:41:33+00:00 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com 2008-10-31T11:26:55+00:00 c8aa7dfc18f7cc90d0aea6c7becbb67dfc5bba4b Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
rename CFG_ macros to CONFIG_SYS 2008-10-18T19:54:03+00:00 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com 2008-10-16T13:01:15+00:00 6d0f6bcf337c5261c08fabe12982178c2c489d76 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
common: Move conditional compilation to Makefile 2008-08-12T23:40:38+00:00 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com 2008-08-12T23:40:38+00:00 d6e9ee92e890f67594ab150689510df361133ead Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Big white-space cleanup. 2008-05-20T22:14:08+00:00 Wolfgang Denk wd@denx.de 2008-05-20T14:00:29+00:00 53677ef18e25c97ac613349087c5cb33ae5a2741 This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> 
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Improve configuration of FPGA subsystem 2008-01-09T12:34:20+00:00 Matthias Fuchs matthias.fuchs@esd-electronics.com 2007-12-27T16:12:34+00:00 0133502e39ff89b67c26cb4015e0e7e8d9571184 This patch removes the FPGA subsystem configuration through the CONFIG_FPGA bitmask configuration option. See README for the new options: CONFIG_FPGA, CONFIG_FPGA_<vendor>, CONFIG_FPGA_<family> Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> 
This patch removes the FPGA subsystem configuration through
the CONFIG_FPGA bitmask configuration option.

See README for the new options:

	CONFIG_FPGA,
	CONFIG_FPGA_<vendor>,
	CONFIG_FPGA_<family>

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Add support for AMD's Pb1x00 eval board; 2005-09-24T22:53:22+00:00 Wolfgang Denk wd@pollux.(none) 2005-09-24T22:53:22+00:00 265817c7e6e55f1c2d05b8aa2080145291968b2e add MII routines to the au1x00 ethernet driver; add USB ohci driver (work in progress) Patch by Thomas Sailer, 20 Jan 2005 
add MII routines to the au1x00 ethernet driver;
add USB ohci driver (work in progress)
Patch by Thomas Sailer, 20 Jan 2005
virtex2 fix for bogus download error messages 2005-09-24T21:41:00+00:00 Wolfgang Denk wd@pollux.(none) 2005-09-24T21:41:00+00:00 9a9200b4a78bc83eee9a927b95cd2185fda7a9dd The virtex2 FPGA download code watches for init going active during a download of config data as an error condition. init also goes active after a configuration is finished in concert with the done signal. So far, the code does not check for done active until all of the configuration data is sent. If configuration data has a few extra pad bytes at the end, this would cause an error message even though the download had suceeded. NOTE: virtex2 slave serial and spartan2 versions may still have the same problem. Patch by Andrew Dyer, 12 Jan 2005 
The virtex2 FPGA download code watches for init going active during
a download of config data as an error condition. init also goes
active after a configuration is finished in concert with the done
signal. So far, the code does not check for done active until all
of the configuration data is sent. If configuration data has a few
extra pad bytes at the end, this would cause an error message even
though the download had suceeded.
NOTE: virtex2 slave serial and spartan2 versions may still have the
same problem.
Patch by Andrew Dyer, 12 Jan 2005
* Patch by Steven Scholz, 25 Feb 2004: 2004-02-27T00:07:27+00:00 wdenk wdenk 2004-02-27T00:07:27+00:00 11dadd547c08a3480ea153482e99c6ae70b73415 - Timeouts in FPGA code should be based on CFG_HZ - Minor cleanup in code for Altera FPGA ACEX1K * Patch by Steven Scholz, 25 Feb 2004: Changed "Directory Hierarchy" section in README * Patch by Masami Komiya, 25 Feb 2004: Reduce copy count in nfs_read_reply() of NFS code 
  - Timeouts in FPGA code should be based on CFG_HZ
  - Minor cleanup in code for Altera FPGA ACEX1K

* Patch by Steven Scholz, 25 Feb 2004:
  Changed "Directory Hierarchy" section in README

* Patch by Masami Komiya, 25 Feb 2004:
  Reduce copy count in nfs_read_reply() of NFS code
Initial revision 2002-08-21T22:08:56+00:00 wdenk wdenk 2002-08-21T22:08:56+00:00 5d3207da3a17b6d37f221379ec15b64812f20b8f