While we expect to call a pointer to a valid FDT (or NULL) as the
platform parameter to an ATF, some ATF versions are not U-Boot aware
and have an insufficiently robust (or an overzealour) parameter
validation: either way, this may cause a hard-stop with uncooperative
ATF versions.

This change adds the option to suppress passing a platform parameter
and will always pass NULL.

Debug output from ATF w/ this option disabled (i.e. default):
      INFO:    plat_param_from_bl2: 0x291450
Debug output from ATF w/ this option enabled:
      INFO:    plat_param_from_bl2: 0

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

The MAC addresses get fixed in the device tree for "ethernet" nodes
is by using trailing number behind "ethernet" found in "/aliases".
It may not be necessary for the "ethernet" nodes to be sequential.
There can be gaps in between or any node disabled

So provide a support to fetch MAC addr sequentially from env
and apply them to "ethernet" nodes in the order they appear in
device tree only if "ethernet" is not "disabled"

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

When booting a itb file with a Ramdisk on a imx6 based
board, U-Boot drops the warning:

Loading Kernel Image ... OK
Loading Ramdisk to 4ecf1000, end 4ef8b11f ... \
CACHE: Misaligned operation at range [4ecf1000,  4ef8b11f]

Fix it!

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Ayoub Zaki <hs@denx.de>

Xilinx changes for v2018.01-rc2-v2

fpga:
- Enable loading bitstream via fit image for !xilinx platforms

zynq:
- Fix SPL SD boot mode

zynqmp:
- Not not reset in panic
- Do not use simple allocator because of fat changes
- Various dt chagnes
- modeboot variable setup
- Fix fpga loading on automotive devices
- Fix coverity issues

test:
- Fix env test for !hush case - Stephen's patch

This drops the limit that fpga is only loaded from FIT images for Xilinx.
This is done by moving the 'partial' check from 'common/image.c' to
'drivers/fpga/xilinx.c' (the only driver supporting partial images yet)
and supplies a weak default implementation in 'drivers/fpga/fpga.c'.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (On zcu102)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

SPL supports reading U-Boot from a RAM location. At present this is
hard-coded to the U-Boot text base address. Use binman to allow this to
come from the image file, if binman is used.

Signed-off-by: Simon Glass <sjg@chromium.org>

Allow SPL to access binman symbols and use this to get the address of
U-Boot. This falls back to CONFIG_SYS_TEXT_BASE if the binman symbol
is not available.

Signed-off-by: Simon Glass <sjg@chromium.org>

For external data, FIT has a optional property "data-position" which
can set the external data to a fixed offset to FIT beginning.
Add the support for this property in SPL FIT.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: "Andrew F. Davis" <afd@ti.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: "tomas.melin@vaisala.com" <tomas.melin@vaisala.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: "Cooper Jr., Franklin" <fcooper@ti.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Rick Altherr <raltherr@google.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: York Sun <york.sun@nxp.com>

Set up logging both before and after relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>