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<title>u-boot.git/common, branch v2019.07-rc4</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Merge tag 'video-updates-for-2019.07-rc3' of git://git.denx.de/u-boot-video</title>
<updated>2019-06-10T13:41:19+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-06-10T13:41:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=99e14d5249a1b46ec4a4321d6125449a8f09b549'/>
<id>99e14d5249a1b46ec4a4321d6125449a8f09b549</id>
<content type='text'>
- mxsfb DM_VIDEO conversion
- splash fix for DM_VIDEO configurations
- meson HDMI fix for boards without hdmi-supply regulator
</content>
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<pre>
- mxsfb DM_VIDEO conversion
- splash fix for DM_VIDEO configurations
- meson HDMI fix for boards without hdmi-supply regulator
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-atmel-fixes-2019.07-a' of git://git.denx.de/u-boot-atmel</title>
<updated>2019-06-10T13:41:00+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-06-10T13:41:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=eb53a18c9e903e35e8e8d52da96c33b63822881c'/>
<id>eb53a18c9e903e35e8e8d52da96c33b63822881c</id>
<content type='text'>
First set of u-boot-atmel fixes for 2019.07 cycle
</content>
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<pre>
First set of u-boot-atmel fixes for 2019.07 cycle
</pre>
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</content>
</entry>
<entry>
<title>spl: Correct SPL_SIZE_LIMIT Kconfig option</title>
<updated>2019-06-08T11:49:00+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-06-08T00:39:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6d277fb0ed145f82dd50cc6e99d2fa553a588c3b'/>
<id>6d277fb0ed145f82dd50cc6e99d2fa553a588c3b</id>
<content type='text'>
When introduced this limit was an int but was then changed to hex
without noting as much in the prompt nor changing existing users.  Put
this back to an int.

Reported-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Tested-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Fixes: 2577015dc5c4 ("spl: add overall SPL size check")
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
When introduced this limit was an int but was then changed to hex
without noting as much in the prompt nor changing existing users.  Put
this back to an int.

Reported-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Tested-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Fixes: 2577015dc5c4 ("spl: add overall SPL size check")
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: add overall SPL size check</title>
<updated>2019-06-07T15:03:39+00:00</updated>
<author>
<name>Simon Goldschmidt</name>
<email>simon.k.r.goldschmidt@gmail.com</email>
</author>
<published>2019-05-24T20:07:04+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2577015dc5c48e7892dea8731a27530543606673'/>
<id>2577015dc5c48e7892dea8731a27530543606673</id>
<content type='text'>
This adds a size check for SPL that can dynamically check generated
SPL binaries (including devicetree) for a size limit that ensures
this image plus global data, heap and stack fit in initial SRAM.

Since some of these sizes are not available to make, a new host tool
'spl_size_limit' is added that dumps the resulting maximum size for
an SPL binary to stdout. This tool is used in toplevel Makefile to
implement the size check on SPL binaries.

Signed-off-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
</content>
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<pre>
This adds a size check for SPL that can dynamically check generated
SPL binaries (including devicetree) for a size limit that ensures
this image plus global data, heap and stack fit in initial SRAM.

Since some of these sizes are not available to make, a new host tool
'spl_size_limit' is added that dumps the resulting maximum size for
an SPL binary to stdout. This tool is used in toplevel Makefile to
implement the size check on SPL binaries.

Signed-off-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: at91: add support for SPL_AT91_MCK_BYPASS</title>
<updated>2019-06-06T07:56:42+00:00</updated>
<author>
<name>Eugen Hristev</name>
<email>eugen.hristev@microchip.com</email>
</author>
<published>2019-05-24T06:38:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0be07872e3200d9d0f6829e641166f0781327cdf'/>
<id>0be07872e3200d9d0f6829e641166f0781327cdf</id>
<content type='text'>
By default the configuration of the PMC is to have an external crystal
connected that requires driving on both XIN and XOUT pins.
The bypass configuration means that only XIN will be used, the SoC will not
do any driving, and the XIN needs to be provided with a proper signal.
This is the MOSCXTBY bit in the PMC main clock generator register.
The SPL needs to properly initialize the PMC registers before switching
to external clock signal and raising the clock to the cruise speed.

Also created Kconfig for this specific configuration.
By default this is disabled.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</content>
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<pre>
By default the configuration of the PMC is to have an external crystal
connected that requires driving on both XIN and XOUT pins.
The bypass configuration means that only XIN will be used, the SoC will not
do any driving, and the XIN needs to be provided with a proper signal.
This is the MOSCXTBY bit in the PMC main clock generator register.
The SPL needs to properly initialize the PMC registers before switching
to external clock signal and raising the clock to the cruise speed.

Also created Kconfig for this specific configuration.
By default this is disabled.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>splash: display splash in DM_VIDEO configurations</title>
<updated>2019-06-04T21:20:43+00:00</updated>
<author>
<name>Igor Opaniuk</name>
<email>igor.opaniuk@toradex.com</email>
</author>
<published>2019-05-29T09:01:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5eb83c0ac114bf193de207f46118075a6c1621c5'/>
<id>5eb83c0ac114bf193de207f46118075a6c1621c5</id>
<content type='text'>
Currently for CONFIG_DM_VIDEO=y setting splashimage env variable doesn't
have any effect. Introduce a common function for both dm-video/lcd stacks,
that checks env("splashimage") and invokes bmp_display() accordingly.
For additional details please check discussion [1].

[1] https://lists.denx.de/pipermail/u-boot/2019-May/371002.html

Signed-off-by: Igor Opaniuk &lt;igor.opaniuk@toradex.com&gt;
</content>
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<pre>
Currently for CONFIG_DM_VIDEO=y setting splashimage env variable doesn't
have any effect. Introduce a common function for both dm-video/lcd stacks,
that checks env("splashimage") and invokes bmp_display() accordingly.
For additional details please check discussion [1].

[1] https://lists.denx.de/pipermail/u-boot/2019-May/371002.html

Signed-off-by: Igor Opaniuk &lt;igor.opaniuk@toradex.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-stm32-20190523' of https://github.com/pchotard/u-boot</title>
<updated>2019-05-24T12:13:27+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-05-24T12:13:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=866a78dc28411f4c76ba887f439f69f1116d8a6b'/>
<id>866a78dc28411f4c76ba887f439f69f1116d8a6b</id>
<content type='text'>
- Add various STM32MP1 fixes for serial, env, clk, board, i2c ...

- Add STM32MP1 DDR driver update:
	These update introduce the DDR interactive mode described in:
	https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode

	This mode is used by the CubeMX: DDR tuning tool.
	https://wiki.st.com/stm32mpu/index.php/STM32CubeMX

	The DDR interactive mode is NOT activated by default because
	it increase the SPL size and slow down the boot time
	(200ms wait added).
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Add various STM32MP1 fixes for serial, env, clk, board, i2c ...

- Add STM32MP1 DDR driver update:
	These update introduce the DDR interactive mode described in:
	https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode

	This mode is used by the CubeMX: DDR tuning tool.
	https://wiki.st.com/stm32mpu/index.php/STM32CubeMX

	The DDR interactive mode is NOT activated by default because
	it increase the SPL size and slow down the boot time
	(200ms wait added).
</pre>
</div>
</content>
</entry>
<entry>
<title>stm32mp1: ram: add interactive mode for DDR configuration</title>
<updated>2019-05-23T09:38:11+00:00</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2019-04-10T12:09:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=01a7510849fdd53f363e4f3aef14342fa2ae417a'/>
<id>01a7510849fdd53f363e4f3aef14342fa2ae417a</id>
<content type='text'>
This debug mode is used by CubeMX DDR tuning tools
or manualy for tests during board bring-up.
It is simple console used to change DDR parameters and check
initialization.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
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<pre>
This debug mode is used by CubeMX DDR tuning tools
or manualy for tests during board bring-up.
It is simple console used to change DDR parameters and check
initialization.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>stm32mp1: migrate PREBOOT to Kconfig</title>
<updated>2019-05-23T09:36:46+00:00</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2019-04-18T15:32:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ce3772ca8d337c071c1028b8cae16765c098bca9'/>
<id>ce3772ca8d337c071c1028b8cae16765c098bca9</id>
<content type='text'>
Use Kconfig to activate CONFIG_PREBOOT (empty by default).

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
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<pre>
Use Kconfig to activate CONFIG_PREBOOT (empty by default).

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>common: fdt_support: Check mtdparts cell size</title>
<updated>2019-05-21T23:33:23+00:00</updated>
<author>
<name>Stefan Mavrodiev</name>
<email>stefan@olimex.com</email>
</author>
<published>2019-04-24T05:31:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3a9a62a18e57b1ed3adbe3a3d00b9793ec55c08f'/>
<id>3a9a62a18e57b1ed3adbe3a3d00b9793ec55c08f</id>
<content type='text'>
When using fdt_fixup_mtdparts() offset and length cell sizes
are limited to 4 bytes (1 cell). However if the mtd device is
bigger then 4GiB, then #address-cells and #size-cells are
8 bytes (2 cells) [1].

This patch read #size-cells and uses either fdt32_t or
fdt64_t cell size. The default is fdt32_t.

[1] Documentation/devicetree/bindings/mtd/partition.txt

Signed-off-by: Stefan Mavrodiev &lt;stefan@olimex.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
When using fdt_fixup_mtdparts() offset and length cell sizes
are limited to 4 bytes (1 cell). However if the mtd device is
bigger then 4GiB, then #address-cells and #size-cells are
8 bytes (2 cells) [1].

This patch read #size-cells and uses either fdt32_t or
fdt64_t cell size. The default is fdt32_t.

[1] Documentation/devicetree/bindings/mtd/partition.txt

Signed-off-by: Stefan Mavrodiev &lt;stefan@olimex.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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