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<title>u-boot.git/common, branch v2025.07-rc5</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2025-06-23T20:04:40Z</updated>
<entry>
<title>arm: kirkwood: fix freeze on boot</title>
<updated>2025-06-23T20:04:40Z</updated>
<author>
<name>Jerome Forissier</name>
<email>jerome.forissier@linaro.org</email>
</author>
<published>2025-06-23T19:10:11Z</published>
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<id>urn:sha1:410d59095a9f2319585bd66152b31f72389dcdaf</id>
<content type='text'>
Commit 6fe50e395080 ("arm: asm/system.h: mrc and mcr need .arm if
__thumb2__ is not set") is not a proper fix for the LTO link error
mentioned in its description. It causes 32-bit arm instructions to be
mixed with thumb instructions, which the Kirkwood SoCs do not support.
For example, board_init_r() is mostly generated in Thumb-1 mode as
expected since the build flags contain -mthumb -mthumb-interwork. The
MCR instruction corresponding to writefr_extra_feature_reg() is also
correcly emitted as a 32-bit ARM instruction (it cannot be encoded in
Thumb-1 anyways). The problem is, the compiler inlines the MCR without
generating the BX or BLX instruction which are needed to transition
between the ARM and the Thumb-1 states. From the objdump output:

006186a0 &lt;board_init_r&gt;:
board_init_r():
/home/jerome/work/u-boot/common/board_r.c:799
  6186a0:       b5f0            push    {r4, r5, r6, r7, lr}
  6186a2:       b0ab            sub     sp, #172        @ 0xac
get_gd():
/home/jerome/work/u-boot/./arch/arm/include/asm/global_data.h:127
  6186a4:       464a            mov     r2, r9
...
/home/jerome/work/u-boot/arch/arm/mach-kirkwood/cpu.c:242
  619aae:       9b15            ldr     r3, [sp, #84]   @ 0x54
writefr_extra_feature_reg():
/home/jerome/work/u-boot/./arch/arm/include/asm/arch/cpu.h:100
  619ab0:       ee2f3f11        mcr     15, 1, r3, cr15, cr1, {0}
                ^^^^^^^^
                32-bit ARM instruction

Further investigation is needed to understand how to fix the issue so
that the code size is minimal for all boards. In the mean time, this
fix disables LTO for the two problematic files (common/board_f.c and
common/board_r.c). This makes the Kirkwood-based boards bootable again.
The binary size is increased by 1048 bytes which is perfectly
acceptable.

Fixes: 6fe50e395080 ("arm: asm/system.h: mrc and mcr need .arm if __thumb2__ is not set")
Reported-by: Tony Dinh &lt;mibodhi@gmail.com&gt;
Tested-by: Tony Dinh &lt;mibodhi@gmail.com&gt;
Signed-off-by: Jerome Forissier &lt;jerome.forissier@linaro.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>common/spl: improve error handling in spl_fit</title>
<updated>2025-06-19T17:01:51Z</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-06-10T09:56:32Z</published>
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<id>urn:sha1:8bb9c275c484206c0314014d8215770aaac4cefe</id>
<content type='text'>
This fix a possible NULL pointer dereference.

There is also a risk of memory leaking within the same portion of code.
The leak will happen if loaded image is bad or damaged. In this case
u-boot-spl will try booting from the other available media. Unfortunately
resources allocated for previous boot media will NOT be freed.

We can't fix that issue as the memory allocation mechanism used here
is unknown. It can be different kinds of malloc() or something else.

To somewhat reduce memory consumption, one can try to reuse previously
allocated memory as it's done in board_spl_fit_buffer_addr() from
test/image/spl_load.c.

The corresponding comment was put to the code as well.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
Reviewed-by: Anshul Dalal &lt;anshuld@ti.com&gt;
</content>
</entry>
<entry>
<title>common/spl: handle properly images with bad checksum</title>
<updated>2025-06-19T17:01:51Z</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-06-10T09:56:31Z</published>
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<id>urn:sha1:3eb43c54fadba457f22e415a2821145164efe662</id>
<content type='text'>
load_simple_fit() returns -EPERM for the images with broken signatures.
Unfortunately this may conflict with image loaging selection on the base
of boot phase. See commit 873112db9ce68c38984ff25808dde726f8dd5573
("spl: Support selecting images based on phase in simple FIT").

Thus loading of

	configurations {
		uboot {
			description = "u-boot";
			firmware = "atf";
			loadables = "atf", "tee", "uboot";
		};
	};

with damaged "tee" image may finish without errors. This may results in
board bricking.

This patch fixes commit 873112db9ce68c38984ff25808dde726f8dd5573
("spl: Support selecting images based on phase in simple FIT")
by replacing EPERM with EBADSLT places where it should be done.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
</entry>
<entry>
<title>common/spl: fix potential out of buffer access in spl_fit_get_image_name function</title>
<updated>2025-06-19T17:01:51Z</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-06-10T09:56:30Z</published>
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<id>urn:sha1:3704b888a4cabac8daea20a4504d513bc47153ca</id>
<content type='text'>
The current code have two issues:
1) ineffective NULL pointer check

	str = strchr(str, '\0') + 1
	if (!str || ...

   The str here will never be NULL (because we add 1 to result of strchr())

2) strchr() may go out of the buffer for the special forms of name variable.
   It's better use memchr() function here.

   According to the code the property is a sequence of C-string like
   shown below:

     'h', 'e', 'l', 'l', 'o', '\0', 'w', 'o', 'r', 'l', 'd', '\0', '!', '\0'

   index is the string number we are interested, so

     index = 0   =&gt;  "hello",
     index = 1   =&gt;  "world",
     index = 2   =&gt;  "!"

   The issue will arrise if last string for some reason have no terminating
   '\0' character. This can happen for damaged or specially crafted dtb.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2025.07-rc4' of https://source.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2025-06-05T14:40:42Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-06-05T14:40:42Z</published>
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<id>urn:sha1:b3f69c14187d413610abbc2b82d1a3752cb342c1</id>
<content type='text'>
AMD/Xilinx/FPGA changes for v2025.07-rc4

usb:
- Fix regulator handling

net:
- Fix MII clock handling

phy:
- Fix GTR line logic for sgmii

pci:
- Fix pcireg_base logic

fpga:
- Fix change handling in intel_sdm_mb driver
</content>
</entry>
<entry>
<title>x86: Correct condition for init_cache_f_r()</title>
<updated>2025-06-04T14:15:12Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-06-04T13:09:02Z</published>
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<id>urn:sha1:4ef863f2d69417df2bd88358bd79a51995ac5bc5</id>
<content type='text'>
The condition here is reversed, which makes link and coral very slow,
leading to lab failures.

Fixes 6c171f7a184 ("common: board: make initcalls static")

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jerome Forissier &lt;jerome.forissier@linaro.org&gt;
</content>
</entry>
<entry>
<title>usb: onboard-hub: Fix return type for regulator APIs</title>
<updated>2025-06-04T08:24:16Z</updated>
<author>
<name>Padmarao Begari</name>
<email>padmarao.begari@amd.com</email>
</author>
<published>2025-04-11T05:55:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=77b053502f396e83f6a0ea38d747d6836dc501f0'/>
<id>urn:sha1:77b053502f396e83f6a0ea38d747d6836dc501f0</id>
<content type='text'>
Apart from ENOENT observing return value as ENOSYS when
!DM_REGULATOR that's why cover both configurations.
Changed code is not working as operation should be "&amp;&amp;"
not "||" (ret != -ENOENT &amp;&amp; ret != -ENOSYS).

Also fix the remove function where the regulator_set_enable_if_allowed()
function is returning an error.

Signed-off-by: Padmarao Begari &lt;padmarao.begari@amd.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/a2d520f14efc30fc28ec59881205e156dabbfcd9.1744350937.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-master-20250522' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2025-05-22T14:41:25Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-05-22T14:41:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=df5dcf7b7eb66f74262c5e501f813aac759557f2'/>
<id>urn:sha1:df5dcf7b7eb66f74262c5e501f813aac759557f2</id>
<content type='text'>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/26275

- Fix boot regression on imx8mn_bsh_smm_s2/s2pro.
- Fix reset on imx6ulz_smm_m2.
- Adjust DDR initialization on imx6ulz_smm_m2.
- Fix CAAM startup error.
</content>
</entry>
<entry>
<title>spl: Kconfig: support U-Boot load from raw NAND</title>
<updated>2025-05-21T10:52:29Z</updated>
<author>
<name>Dario Binacchi</name>
<email>dario.binacchi@amarulasolutions.com</email>
</author>
<published>2025-05-20T08:54:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8acea298bb82c38b20855cd46a46b9e418dc1fb0'/>
<id>urn:sha1:8acea298bb82c38b20855cd46a46b9e418dc1fb0</id>
<content type='text'>
Commit 2a00d73d081a ("spl: mmc: Try to clean up raw-mode options") breaks
the boot of the BSH SMM S2 board. As stated in the commit itself, "Some
boards use this value even though MMC is not enabled in SPL, for example
imx8mn_bsh_smm_s2".

Support load of the U-Boot image from raw NAND sector. This is equivalent
to load from MMC raw sector.

Fixes: 2a00d73d081a ("spl: mmc: Try to clean up raw-mode options")
Signed-off-by: Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;
</content>
</entry>
<entry>
<title>riscv: Access gd with inline assembly when building with LTO or Clang</title>
<updated>2025-05-21T08:46:16Z</updated>
<author>
<name>Yao Zi</name>
<email>ziyao@disroot.org</email>
</author>
<published>2025-04-27T14:50:11Z</published>
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<id>urn:sha1:307666be28db0d89cbdcfafd2cf0e0cf5bf386db</id>
<content type='text'>
Similar to AArch64's case, Clang may wrongly fold accesses to gd pointer
which is defined with register qualifier into constants, breaking
various components.

This patch defines gd as a macro when building with Clang or LTO, which
expands to get_gd() that accesses gp pointer in assembly, making RISC-V
ports function properly and preparing for introduction of LTO in the
future. Board initialization code is also adapted for non-assignable gd.

Reported-by: Nathaniel Hourt &lt;I@nathaniel.land&gt;
Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
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