Today we typically enable CMD_SATA in order to have the SATA
functionality itself enabled, despite there being a clean split between
the two symbols. This in turn leads to potential configuration problems.
Split things so that SATA continues to be separate and not CMD_SATA
instead depends, functionally, on AHCI being enabled.

To do all of this:
- Have X86 select AHCI directly rather than "default y" it later.
- Make CMD_SATA be a default y option, given the split of platforms that
  enabled SATA and did, or did not, enable CMD_SATA.
- Change "imply CMD_SATA" to "imply SATA"
- Correct TARGET_VEXPRESS64_JUNO because you cannot select SATA_SIL
  without PCI (and in turn, SATA is needed for SATA_SIL).
- Update a number of defconfigs to have no functional change.

Signed-off-by: Tom Rini <trini@konsulko.com>

Enabled the default utilization of the NFS command on all Xilinx
platforms to facilitate booting images through the network using
the NFS protocol.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260130114148.1817379-1-pranav.vinaytilak@amd.com

zcu102 has PCIe x1 enabled by default that's why enable PCIe root port
driver also with e1000 networking card for validation.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bc09405d9a2df190f807bdf750ed47b86e6b83b2.1766153383.git.michal.simek@amd.com

Enable the new PCA9541 i2c bus arbiter on AMD/Xilinx SOCs by default.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/edfb7e7a6e800484d3ac3bf45a4f83adfcdd1754.1764170621.git.michal.simek@amd.com

Enable SNTP/DATE commands on all Xilinx boards.
Also enable RTC_EMULATION driver for platforms which don't have physical
RTC. Enabling DM_RTC is enabling by default also CMD_DATE.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2605b1618a311efe4f35442c34e7cec973060630.1759393175.git.michal.simek@amd.com

Enable MSCC phy driver instead of VITESSE. Vitesse driver is much older and
is on the way out that's why switch to MSCC driver which covers VSC8531
which is used on one Versal board.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0a441e488a29bd1c93677a6f63a4a04a3cc1c9f5.1759216164.git.michal.simek@amd.com

The commit 210702ae6ce8 ("spl: spi: fix falcon mode for spi boot") fixed
the logic of spl_start_uboot() where 0 means OS boot and 1 means u-boot.
Zynq/ZynqMP enable OS_BOOT by default but it was never really be used
that's why disable it to boot via U-Boot phase all the time.

Signed-off-by: Michal Simek <michal.simek@amd.com>

Legacy SPI flash devices used a 24-bit (3-byte) addressing scheme,
limiting the addressable memory to 16 MB. To support larger densities
(256 Mbit and higher), extended addressing schemes, such as 32-bit
(4-byte) addressing, were introduced. If the flash density exceeds
16 MB and CONFIG_SPI_FLASH_BAR is disabled, the device will use a
4-byte addressing mode.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250707043738.795179-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

Enable xilinx ethernet phy on ZynqMP by default.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250624084645.1185428-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

Marek Vasut <marek.vasut+renesas@mailbox.org> says:

Rename the environment related variables and add ENV_ prefix, so that
all configuration options which are related to environment would have
an CONFIG_ENV_ prefix. No functional change.

Link: https://lore.kernel.org/r/20250609192701.20260-1-marek.vasut+renesas@mailbox.org