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<title>u-boot.git/configs, branch v2016.01-rc4</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/configs?h=v2016.01-rc4</id>
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<updated>2015-12-27T14:15:57Z</updated>
<entry>
<title>Merge branch 'master' of http://git.denx.de/u-boot-sunxi</title>
<updated>2015-12-27T14:15:57Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2015-12-27T14:15:57Z</published>
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<id>urn:sha1:78680314c53a95c0bb25e942662979843b60d7b9</id>
<content type='text'>
</content>
</entry>
<entry>
<title>sunxi: Reduce Orangepi PC RAM speed to 624 MHz</title>
<updated>2015-12-27T11:30:39Z</updated>
<author>
<name>Hans de Goede</name>
<email>hdegoede@redhat.com</email>
</author>
<published>2015-12-23T10:48:40Z</published>
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<id>urn:sha1:e7d6aa0b74b7f4d08ee68da8a586c76c761348e2</id>
<content type='text'>
There are some reports of stability issues at 672 MHz, see:
http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit

So reduce the DRAM speed to 624MHz which seems to be reliable everywhere.

Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Ian Campbell &lt;ijc@hellion.org.uk&gt;
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-socfpga</title>
<updated>2015-12-24T14:31:35Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2015-12-24T14:31:35Z</published>
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<id>urn:sha1:40253dd12a64086885097d253b665c9876635e76</id>
<content type='text'>
Conflicts:
	include/configs/axs101.h

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: sr1500: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS</title>
<updated>2015-12-22T20:29:59Z</updated>
<author>
<name>Chin Liang See</name>
<email>clsee@altera.com</email>
</author>
<published>2015-12-22T07:32:30Z</published>
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<id>urn:sha1:0645c773156c432c2fac579290d52e7962f815bc</id>
<content type='text'>
Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI
and UBIFS support on serial NOR flash

Signed-off-by: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Cc: Dinh Nguyen &lt;dinh.linux@gmail.com&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: arria5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS</title>
<updated>2015-12-22T20:29:47Z</updated>
<author>
<name>Chin Liang See</name>
<email>clsee@altera.com</email>
</author>
<published>2015-12-22T07:32:28Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aa2ba829257a29bb38e47b51b3e40ad68e92d773'/>
<id>urn:sha1:aa2ba829257a29bb38e47b51b3e40ad68e92d773</id>
<content type='text'>
Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI
and UBIFS support on serial NOR flash

Signed-off-by: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Cc: Dinh Nguyen &lt;dinh.linux@gmail.com&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS</title>
<updated>2015-12-22T20:29:29Z</updated>
<author>
<name>Chin Liang See</name>
<email>clsee@altera.com</email>
</author>
<published>2015-12-22T07:32:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6a6e6cf869637d34c5efac853d69bba7ef3728aa'/>
<id>urn:sha1:6a6e6cf869637d34c5efac853d69bba7ef3728aa</id>
<content type='text'>
Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI
and UBIFS support on serial NOR flash

Signed-off-by: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Cc: Dinh Nguyen &lt;dinh.linux@gmail.com&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>ARM: uniphier: rename rest of defconfig files</title>
<updated>2015-12-22T15:08:58Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-12-17T09:00:41Z</published>
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<id>urn:sha1:e90b36862888055c4cbb3b9f964d106aaf0ef5c8</id>
<content type='text'>
Rename rest of defconfig files of UniPhier SoC family to have the
prefix uniphier_.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>ARM: uniphier: support ProXstream2, PH1-LD6b boards in single defconfig</title>
<updated>2015-12-22T15:08:57Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-12-17T09:00:40Z</published>
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<id>urn:sha1:1a2645341a1fd6adda37deb8b9bc9f92c2fb9dbd</id>
<content type='text'>
These boards are similar enough to be supported in a single defconfig
file.  Distinguish one from another by "DEVICE_TREE" from the command
line.  The how-to-build in doc/README.uniphier should be also updated.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>ARM: uniphier: merge ph1_ld4_defconfig and ph1_sld8_defconfig</title>
<updated>2015-12-22T15:08:57Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-12-17T09:00:39Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5fd3f4346e7d3b11c593c13cbccec7095513c380'/>
<id>urn:sha1:5fd3f4346e7d3b11c593c13cbccec7095513c380</id>
<content type='text'>
These two are similar enough to be merged into a single
defconfig file.  Distinguish one from another by "DEVICE_TREE"
from the command line.  The how-to-build in doc/README.uniphier
should be also updated.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: Enable simple bus in SPL on all boards</title>
<updated>2015-12-22T03:42:28Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2015-12-22T03:16:01Z</published>
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<id>urn:sha1:574967c241301b924748ce205f29f494e32967fe</id>
<content type='text'>
The simple bus support must be enabled in SPL, otherwise the boards
will not be able to parse the DT and will fail to boot.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</content>
</entry>
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