u-boot.git/configs, branch v2023.04

configs: Resync with savedefconfig

2023-03-27T17:39:17Z

Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini

rockchip: Drop bootstage stash in TPL and SPL for rockpro64

2023-03-27T15:16:04Z

Unfortunately the IRAM used to stash the bootstage records in TPL becomes inaccessible after SPL runs. Presumably this is because of ATF taking it over. We could move the stash to another address in SPL, before passing it to U-Boot proper. But it seems easier to wait until we have support for standard passage[1] which should not be too far away. For now, disable it in TPL and SPL. [1] https://patchwork.ozlabs.org/project/uboot/cover/ 20220117150428.1580273-1-sjg@chromium.org/ Signed-off-by: Simon Glass Tested-by: Vagrant Cascadian

x86: som-db5800-som-6867: Fix up adjustment of CONFIG_TEXT_BASE

2023-03-27T01:38:44Z

With recent CONFIG_TEXT_BASE changes, there are inconsistencies between several settings. Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC cache out of the way too. Fixes: e23cae30801f ("x86: som-db5800-som-6867: Adjust CONFIG_TEXT_BASE") Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: dfi-bt700: Fix up adjustment of CONFIG_TEXT_BASE

2023-03-27T01:38:44Z

With recent CONFIG_TEXT_BASE changes, there are inconsistencies between several settings. Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC cache out of the way too. Fixes: 5d1c8342aeaa ("x86: dfi-bt700: Adjust CONFIG_TEXT_BASE") Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: conga-qeval20-qa3-e3845: Fix up adjustment of CONFIG_TEXT_BASE

2023-03-27T01:38:44Z

With recent CONFIG_TEXT_BASE changes, there are inconsistencies between several settings. Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC cache out of the way too. Fixes: 388f93f96354 ("x86: conga-qeval20-qa3-e3845: Adjust CONFIG_TEXT_BASE") Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Stefan Roese

x86: bayleybay: Fix up adjustment of CONFIG_TEXT_BASE

2023-03-27T01:38:44Z

With recent CONFIG_TEXT_BASE changes, there are inconsistencies between several settings. Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC cache out of the way too. Fixes: f38be3086837 ("x86: bayleybay: Adjust CONFIG_TEXT_BASE") Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: minnowmax: Fix up adjustment of CONFIG_TEXT_BASE

2023-03-27T01:38:44Z

With recent CONFIG_TEXT_BASE changes, there are inconsistencies between several settings. Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC cache out of the way too. Add documentation on how to make this change safely. Fixes: 66e2c665f3b6 ("x86: minnowmax: Adjust CONFIG_TEXT_BASE") Signed-off-by: Simon Glass Reviewed-by: Bin Meng

configs: am62x_evm_a53_defconfig: Fix SF_DEFAULT_MODE

2023-03-22T16:51:13Z

Setting sf default mode to 0x3 breaks sf update when we do SF read through u-boot console. This issue arises when we do a splash image through OSPI flash media, to fix this set the default mode to 0x0. Fixes: 04150400c967 ("configs: enable OSPI related configs in AM62x") Signed-off-by: Nikhil M Jain

configs: am62: move stack and heap to HSM RAM

2023-03-22T16:51:10Z

On high security devices, ROM enables firewalls to protect the OCSRAM region access during bootup. Only after TIFS has started (and had time to disable the OCSRAM firewall region) will we have write access to the region. This means we will need to move the stack & heap from OCSRAM to HSM RAM and reduce the size of BSS and the SPL to allow it to fit properly. To protect us from overflowing our ~256k of HSM SRAM, add limits and check during the wakeup SPL build. Signed-off-by: Kamlesh Gurudasani

Merge tag 'u-boot-amlogic-20230322' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

2023-03-22T13:21:41Z

- odroid-go-ultra: setup PMIC regulators at board init