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<title>u-boot.git/configs, branch v2025.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/configs?h=v2025.04</id>
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<updated>2025-04-06T16:02:49Z</updated>
<entry>
<title>x86: emulation: Disable bloblist for now</title>
<updated>2025-04-06T16:02:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-04T16:36:17Z</published>
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<id>urn:sha1:cf6d4535cc4ca250290a13458014aac4a29a8cec</id>
<content type='text'>
As reported by Niklas Sombert, enabling bloblist on these platforms
means that we currently don't pass SMBIOS tables on to later stages. For
the v2025.04 release, disable bloblists as that is sufficient to restore
functionality and we will address the underlying problem for the next
release.

Link: https://lore.kernel.org/u-boot/c1dc7446-d1d0-4ef2-b201-09fc612aa8db@uni-duesseldorf.de
Reported-by: Niklas Sombert &lt;niklas.sombert@uni-duesseldorf.de&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>configs: sama5d27: Fix the 'reset' command</title>
<updated>2025-04-01T08:36:35Z</updated>
<author>
<name>Fabio Estevam</name>
<email>festevam@denx.de</email>
</author>
<published>2025-03-31T20:37:34Z</published>
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<id>urn:sha1:aa7d628b78df74faffeaa942b61a0d75d3526eb3</id>
<content type='text'>
Since commit 61040097a9d1 ("reset: at91: Add reset driver for basic
assert/deassert operations") the "atmel,sama5d3-rstc" compatible for
the sama5d2 reset controller in sama5d2.dtsi is not handled by
CONFIG_SYSRESET_AT91 anymore, but by CONFIG_RESET_AT91 now.

This resulted in the following error, when trying to reset from the U-Boot
shell on a sama5d27_wlsom1 board:

 =&gt; reset
 resetting ...
 System reset not supported on this platform
 ### ERROR ### Please RESET the board ###

Fix it by enabling the CONFIG_RESET_AT91 driver in all sama5d27 defconfigs.

Tested on a sama5d27_wlsom1 board.

Based on the fix in commit e1ee52ca56fc ("configs: at91: sam9x60: Switch
to new reset driver")

Fixes: 61040097a9d1 ("reset: at91: Add reset driver for basic assert/deassert operations")
Signed-off-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
</entry>
<entry>
<title>arm64: renesas: Enable fallback PSCI on Renesas R-Car R8A779G0 V4H White Hawk</title>
<updated>2025-03-16T13:47:28Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-03-02T22:30:02Z</published>
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<id>urn:sha1:9292a3047181a62f00c8f97db2b46a146f803bff</id>
<content type='text'>
Enable fallback PSCI provider on Renesas R-Car R8A779G0 V4H White Hawk board.

This fallback PSCI provider provides basic PSCI interface which can be used
by the Linux kernel, but does not provide support for bringing up additional
CPU cores or any other functionality, except for SoC level reset.

This fallback PSCI provider is intended as a fallback in case a proper PSCI
provider is not started before the Linux kernel is started. Linux kernel on
ARMv8a will fail to boot in case a PSCI provider is not available, and this
basic fallback PSCI provider assures such a boot failure cannot occur, even
if that means the system will boot in degraded mode with only one CPU core
available, that is still sufficient to perform recovery.

In the common case, a proper PSCI provider should be started as part of
the Linux kernel fitImage, as the BL31 loadable, and replace this basic
fallback PSCI provider before the Linux kernel is started.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>configs: Resync with savedefconfig</title>
<updated>2025-03-10T23:31:22Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-03-10T23:30:32Z</published>
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<id>urn:sha1:bdf41fb7b386bdf60303b7a92431467c12779c86</id>
<content type='text'>
Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2025.04-rc4' of https://source.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2025-03-05T18:11:18Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-03-05T18:11:18Z</published>
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<id>urn:sha1:367971d20594572bc31c0195fdf67611ead94e08</id>
<content type='text'>
AMD/Xilinx changes for v2025.04-rc4

Zynq:
- Guard code around SPL_FS_LOAD_PAYLOAD_NAME

Versal*:
- Remove tftp block size 4096

Versal:
- Use clocks per DT binding
- Store driver data in data section

Versal Gen 2:
- Fix major/minor version decoding
</content>
</entry>
<entry>
<title>xilinx: Remove tftp block size 4096</title>
<updated>2025-03-05T11:42:34Z</updated>
<author>
<name>Padmarao Begari</name>
<email>padmarao.begari@amd.com</email>
</author>
<published>2025-03-04T04:30:30Z</published>
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<id>urn:sha1:8d2d615f14435c8d2d4e80509310691443b3a3d5</id>
<content type='text'>
The zynqmp gem driver support max MTU size 1536, so remove tftp
block size 4096 from defconfig and use default tftp block size.

Fixes: a33b4b96b3cf ("xilinx: Enable MBEDTLS/LWIP/WGET and WGET_HTTPS")
Signed-off-by: Padmarao Begari &lt;padmarao.begari@amd.com&gt;
Link: https://lore.kernel.org/r/20250304043030.2344536-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
<entry>
<title>samsung: snow: Use BLOBLIST_FIXED</title>
<updated>2025-03-04T14:22:10Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-02-26T16:26:15Z</published>
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<id>urn:sha1:3ff97659ae9ff97aa3de0739b2d32a2d9b689528</id>
<content type='text'>
Snow requires a fixed bloblist to operate, so re-enable this option.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Fixes: 864106f3c47 ("bloblist: Make BLOBLIST_ALLOC the default")
</content>
</entry>
<entry>
<title>rockchip: nanopi-r3s-rk3566: disable unneeded CONFIG_NVME_PCI</title>
<updated>2025-02-28T11:21:17Z</updated>
<author>
<name>Tianling Shen</name>
<email>cnsztl@gmail.com</email>
</author>
<published>2025-01-15T05:37:05Z</published>
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<id>urn:sha1:a390c485756cf2b352ee781a94e47dafc7b9b2c8</id>
<content type='text'>
This board does not have any NVMe slot, so disable unneeded
CONFIG_NVME_PCI option.

Fixes: bf4a33e725ae ("board: rockchip: add FriendlyElec NanoPi R3S")
Signed-off-by: Tianling Shen &lt;cnsztl@gmail.com&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3308-rock-s0: Fix SD-card boot on v1.1 hw revision</title>
<updated>2025-02-28T11:13:50Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-02-20T18:31:28Z</published>
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<id>urn:sha1:4871db60824e45d70136c0879054f4a732da67b1</id>
<content type='text'>
BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MMC
driver set PWREN high in dwmci_init().

However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.

Upstream Linux commit 26c100232b09 "arm64: dts: rockchip: Fix sdmmc
access on rk3308-rock-s0 v1.1 boards" fixed this issue by adding a
vcc_sd regulator.

Include the new vcc_sd regulator in SPL and enable required Kconfig
options to set GPIO4_D6 low to fix reading sdmmc on v1.1 hw revision.

Fixes: 25438c40a007 ("board: rockchip: Add Radxa ROCK S0")
Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>imx8mm: imx8mm_evk: fix BOOTSTD boot</title>
<updated>2025-02-27T11:14:37Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2025-02-22T12:17:11Z</published>
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<id>urn:sha1:542cac02d0b2070708f40746f4bfef0611df6f85</id>
<content type='text'>
Select BOOTSTD_FULL and BOOTSTD_BOOTCOMMAND
Correct DEFAULT_FDT_FILE
Correct env file for imx8mm_evk_fspi_defconfig

Fixes: 364ba68ed1a ("imx: imx8mm_evk: Switch to BOOTSTD")
Reported-by: Ludwig Nussel &lt;ludwig.nussel@siemens.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
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