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<title>u-boot.git/configs, branch v2026.01-rc5</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>rockchip: rock5b-rk3588: Add support for Radxa ROCK 5T</title>
<updated>2025-12-13T16:02:10+00:00</updated>
<author>
<name>FUKAUMI Naoki</name>
<email>naoki@radxa.com</email>
</author>
<published>2025-11-07T06:47:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=73159af02d023d01d9c4c08d319eb86cb10f1983'/>
<id>73159af02d023d01d9c4c08d319eb86cb10f1983</id>
<content type='text'>
Include the FDT for Radxa ROCK 5T in the FIT, in addition to those for
5B and 5B+, and add board selection code to load the 5T FDT when the
DRAM type is LPDDR5 and ADC channel 5 value is close to 1016.

Signed-off-by: FUKAUMI Naoki &lt;naoki@radxa.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
Include the FDT for Radxa ROCK 5T in the FIT, in addition to those for
5B and 5B+, and add board selection code to load the 5T FDT when the
DRAM type is LPDDR5 and ADC channel 5 value is close to 1016.

Signed-off-by: FUKAUMI Naoki &lt;naoki@radxa.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rock5b-rk3588: Add support for ROCK 5B+</title>
<updated>2025-12-13T16:02:10+00:00</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-08-01T17:09:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2df3666a241b706005ac8130c06188678c32ba39'/>
<id>2df3666a241b706005ac8130c06188678c32ba39</id>
<content type='text'>
Include FDTs for both ROCK 5B and 5B+ in the FIT and add board selection
code to load the 5B+ FDT when the DRAM type is LPDDR5 and ADC channel 5
value is close to 4095.

  U-Boot 2025.07 (Jul 14 2025 - 21:28:20 +0000)

  Model: Radxa ROCK 5B+
  SoC:   RK3588
  DRAM:  8 GiB

Features tested on a ROCK 5B+ v1.2:
- SD-card boot
- eMMC boot
- SPI flash boot
- PCIe/NVMe
- Ethernet
- USB/TCPM

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
Include FDTs for both ROCK 5B and 5B+ in the FIT and add board selection
code to load the 5B+ FDT when the DRAM type is LPDDR5 and ADC channel 5
value is close to 4095.

  U-Boot 2025.07 (Jul 14 2025 - 21:28:20 +0000)

  Model: Radxa ROCK 5B+
  SoC:   RK3588
  DRAM:  8 GiB

Features tested on a ROCK 5B+ v1.2:
- SD-card boot
- eMMC boot
- SPI flash boot
- PCIe/NVMe
- Ethernet
- USB/TCPM

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>configs: am43xx: Migrate to CONFIG_SYS_MEM_TOP_HIDE from CFG_PRAM</title>
<updated>2025-12-10T15:28:37+00:00</updated>
<author>
<name>Beleswar Padhi</name>
<email>b-padhi@ti.com</email>
</author>
<published>2025-12-09T05:50:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=da54deb1ac8ee65475c7dca556df751b7e31806e'/>
<id>da54deb1ac8ee65475c7dca556df751b7e31806e</id>
<content type='text'>
The TI AM43xx HS boards have been using CFG_PRAM to hide the top 64MB
firewalled DRAM memory from U-Boot. However, CFG_PRAM only prevents
U-Boot from relocating into that memory, but it is still open for access
for any other usage.

Therefore, migrate into using CONFIG_SYS_MEM_TOP_HIDE which reduces the
ram size itself ensuring that memory is not visible to U-Boot at all
(either for reloc, or general usage).

Signed-off-by: Beleswar Padhi &lt;b-padhi@ti.com&gt;
</content>
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<pre>
The TI AM43xx HS boards have been using CFG_PRAM to hide the top 64MB
firewalled DRAM memory from U-Boot. However, CFG_PRAM only prevents
U-Boot from relocating into that memory, but it is still open for access
for any other usage.

Therefore, migrate into using CONFIG_SYS_MEM_TOP_HIDE which reduces the
ram size itself ensuring that memory is not visible to U-Boot at all
(either for reloc, or general usage).

Signed-off-by: Beleswar Padhi &lt;b-padhi@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: stm32: Add 1 GiB DRAM settings for DH STM32MP13xx DHCOR SoM</title>
<updated>2025-12-09T14:24:30+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@mailbox.org</email>
</author>
<published>2025-11-18T23:19:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=86ff2cfa80e9abb71789b299cfcbfc0b9337174d'/>
<id>86ff2cfa80e9abb71789b299cfcbfc0b9337174d</id>
<content type='text'>
Add DRAM settings for 1 GiB variant of DH STM32MP13xx DHCOR SoM
and support for SoM DRAM coding HW straps decoding and automatic
DRAM configuration selection. Enable CONFIG_BOARD_EARLY_INIT_F on
all STM32MP1 DHSOM, as it is required for the HW straps decoding.

Signed-off-by: Marek Vasut &lt;marek.vasut@mailbox.org&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add DRAM settings for 1 GiB variant of DH STM32MP13xx DHCOR SoM
and support for SoM DRAM coding HW straps decoding and automatic
DRAM configuration selection. Enable CONFIG_BOARD_EARLY_INIT_F on
all STM32MP1 DHSOM, as it is required for the HW straps decoding.

Signed-off-by: Marek Vasut &lt;marek.vasut@mailbox.org&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: versal: Fix LTO for mini_ospi/mini_qspi</title>
<updated>2025-12-08T15:05:15+00:00</updated>
<author>
<name>Pranav Tilak</name>
<email>pranav.vinaytilak@amd.com</email>
</author>
<published>2025-12-08T13:54:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f2c148e0df3a50c74130b4cd0c9bd3d02ba375b2'/>
<id>f2c148e0df3a50c74130b4cd0c9bd3d02ba375b2</id>
<content type='text'>
With LTO enabled, mini U-Boot was hanging during reloc_fdt().
The initial stack pointer was placed too low, and the FDT memcpy
destination was carved only 4KB above it. This left insufficient
margin, causing the FDT copy to overwrite the live early stack
and corrupt execution before relocation.

To fix this, increase the malloc heap from 8KB to 12KB and raise the
initial stack pointer by 4KB. Together these adjustments increase
the separation between the early stack and the FDT region during
the pre-relocation phase, eliminating the overlap and fixing the
hang on mini builds (QSPI/OSPI).

Signed-off-by: Pranav Tilak &lt;pranav.vinaytilak@amd.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With LTO enabled, mini U-Boot was hanging during reloc_fdt().
The initial stack pointer was placed too low, and the FDT memcpy
destination was carved only 4KB above it. This left insufficient
margin, causing the FDT copy to overwrite the live early stack
and corrupt execution before relocation.

To fix this, increase the malloc heap from 8KB to 12KB and raise the
initial stack pointer by 4KB. Together these adjustments increase
the separation between the early stack and the FDT region during
the pre-relocation phase, eliminating the overlap and fixing the
hang on mini builds (QSPI/OSPI).

Signed-off-by: Pranav Tilak &lt;pranav.vinaytilak@amd.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>configs: Resync with savedefconfig</title>
<updated>2025-12-08T14:37:35+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-12-08T14:37:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f21a301147a017ce9f99b63e2f69343c3cbabd9c'/>
<id>f21a301147a017ce9f99b63e2f69343c3cbabd9c</id>
<content type='text'>
Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>configs: phycore_am64x_a53_defconfig: Drop eMMC HS400 mode</title>
<updated>2025-12-06T17:40:49+00:00</updated>
<author>
<name>Dominik Haller</name>
<email>d.haller@phytec.de</email>
</author>
<published>2025-11-20T21:26:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d3291d35b605552e1ad0117a2c396fe90011358e'/>
<id>d3291d35b605552e1ad0117a2c396fe90011358e</id>
<content type='text'>
Remove the unsupported MMC_HS400 mode and select MMC_HS200 instead to avoid
confusion.

Signed-off-by: Dominik Haller &lt;d.haller@phytec.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove the unsupported MMC_HS400 mode and select MMC_HS200 instead to avoid
confusion.

Signed-off-by: Dominik Haller &lt;d.haller@phytec.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: renesas: Add Renesas R-Car X5H R8A78000 Ironhide board code</title>
<updated>2025-12-02T23:17:15+00:00</updated>
<author>
<name>Hai Pham</name>
<email>hai.pham.ud@renesas.com</email>
</author>
<published>2025-12-02T18:34:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cf71963778ee1c1ac4b86c78acae138591b4169c'/>
<id>cf71963778ee1c1ac4b86c78acae138591b4169c</id>
<content type='text'>
Add initial support for Renesas R-Car X5H R8A78000 Ironhide board.
This consists mainly of DTs, Makefile and Kconfig entries and board
specific configuration files.

The DTs will be gradually switched over to Linux DTs via OF_UPSTREAM
once Linux DTs become available upstream, as upstreaming progresses.

Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add initial support for Renesas R-Car X5H R8A78000 Ironhide board.
This consists mainly of DTs, Makefile and Kconfig entries and board
specific configuration files.

The DTs will be gradually switched over to Linux DTs via OF_UPSTREAM
once Linux DTs become available upstream, as upstreaming progresses.

Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh</title>
<updated>2025-12-02T21:25:14+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-12-02T21:25:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d4a8124805e3de3da5c9a005daa791bfba2ed28d'/>
<id>d4a8124805e3de3da5c9a005daa791bfba2ed28d</id>
<content type='text'>
Two fixes for R-Car Gen4 and CONFIG_ENV_OVERWRITE=n to always expect
"setenv -f" to be used when overwriting ethernet MAC on all R-Car.
</content>
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<pre>
Two fixes for R-Car Gen4 and CONFIG_ENV_OVERWRITE=n to always expect
"setenv -f" to be used when overwriting ethernet MAC on all R-Car.
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-samsung</title>
<updated>2025-12-02T19:00:44+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-12-02T18:19:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=30a9f675e562669de614b26956dcb1ec75837a64'/>
<id>30a9f675e562669de614b26956dcb1ec75837a64</id>
<content type='text'>
- Assorted updates
</content>
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<pre>
- Assorted updates
</pre>
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</content>
</entry>
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