u-boot.git/configs, branch v2026.04-rc4 Unnamed repository; edit this file 'description' to name the repository. configs: j722s_evm_a53_defconfig: enable 64-bit addressing for PCIe 2026-03-09T15:35:50+00:00 Siddharth Vadapalli s-vadapalli@ti.com 2026-02-27T11:58:34+00:00 f0bb3940b132d039a249815d34eea6fae5be60d6 The PCIe0 instance of PCIe on the J722S SoC uses the 4 GB Address Window starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses. Hence, enable CONFIG_SYS_PCI_64BIT. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream") 
The PCIe0 instance of PCIe on the J722S SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
configs: j7200_evm_a72_defconfig: enable 64-bit addressing for PCIe 2026-03-09T15:35:49+00:00 Siddharth Vadapalli s-vadapalli@ti.com 2026-02-27T11:58:33+00:00 b04d709459073c6dc48cafd8eed9d14f552fdaa7 The PCIe1 instance of PCIe on the J7200 SoC uses the 4 GB Address Window starting from 0x41_0000_0000 to map System Addresses to PCIe Bus Addresses. Hence, enable CONFIG_SYS_PCI_64BIT. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream") 
The PCIe1 instance of PCIe on the J7200 SoC uses the 4 GB Address Window
starting from 0x41_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
configs: am64x_evm_a53_defconfig: enable 64-bit addressing for PCIe 2026-03-09T15:35:47+00:00 Siddharth Vadapalli s-vadapalli@ti.com 2026-02-27T11:58:32+00:00 430874ce20c78c4d2f427dac34860642f044c5fd The PCIe0 instance of PCIe on the AM64x SoC uses the 4 GB Address Window starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses. Hence, enable CONFIG_SYS_PCI_64BIT. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream") 
The PCIe0 instance of PCIe on the AM64x SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
configs: {am69_sk, j784s4_evm}_a72_defconfig: enable PCIe Root-Complex mode 2026-03-09T15:35:46+00:00 Siddharth Vadapalli s-vadapalli@ti.com 2026-02-27T11:58:31+00:00 724952ac41c144a8528a273aeed23422b1e2330e The PCIe Controllers on the J784S4 and AM69 SoCs support Root-Complex mode of operation. PCIe0 instance of PCIe on both of the SoCs is brought out on the Starter-Kit (AM69) and EVM (J784S4) boards. Hence, enable the configs required for Root-Complex mode of operation. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream") 
The PCIe Controllers on the J784S4 and AM69 SoCs support Root-Complex
mode of operation. PCIe0 instance of PCIe on both of the SoCs is brought
out on the Starter-Kit (AM69) and EVM (J784S4) boards. Hence, enable
the configs required for Root-Complex mode of operation.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-samsung 2026-02-25T14:49:28+00:00 Tom Rini trini@konsulko.com 2026-02-25T14:49:28+00:00 7995bf8dea2d5b3eb7fcb836636f4773924ec35d - Assorted platform and video driver updates 
- Assorted platform and video driver updates
configs: exynos-mobile: add DEFAULT_DEVICE_TREE option 2026-02-25T01:47:03+00:00 Kaustabh Chakraborty kauschluss@disroot.org 2026-02-24T15:37:11+00:00 336dd39b956e5f7e078da1d2b689415a41484067 Add a default fallback device tree in order to allow a successful build without mentioning the DEVICE_TREE= make flag. Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> 
Add a default fallback device tree in order to allow a successful build
without mentioning the DEVICE_TREE= make flag.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
board: samsung: exynos-mobile: add EFI capsule update support 2026-02-25T01:47:03+00:00 Kaustabh Chakraborty kauschluss@disroot.org 2026-02-24T15:37:10+00:00 0e61fc5364dc6b4af88b44ea2e1aa9d84c9f1ca7 Add support for EFI capsule updates via U-Boot's DFU. This flashes the boot partition with the new image provided in the capsule. Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> 
Add support for EFI capsule updates via U-Boot's DFU. This flashes the
boot partition with the new image provided in the capsule.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
board: samsung: exynos-mobile: use blkmap for booting from userdata subpartitions 2026-02-25T01:47:03+00:00 Kaustabh Chakraborty kauschluss@disroot.org 2026-02-24T15:37:09+00:00 db0fe21bd38f27f570ce16670ccad567efd596f4 Some distributions tend to provide a single combined image with EFS and the system root filesystem. Flashing it as-is in a single partition (usually done in userdata partition as it is the largest) is not bootable as U-Boot does not understand subpartitions. Use blkmap to map the userdata partition into its own block device. Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> 
Some distributions tend to provide a single combined image with EFS and
the system root filesystem. Flashing it as-is in a single partition
(usually done in userdata partition as it is the largest) is not
bootable as U-Boot does not understand subpartitions.

Use blkmap to map the userdata partition into its own block device.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
configs: stm32mp25: Enable CMD_STM32KEY 2026-02-24T16:47:46+00:00 Patrice Chotard patrice.chotard@foss.st.com 2026-02-04T10:20:51+00:00 20727a083f46bb5f664f9da624254ad38e88f400 Enable CONFIG_CMD_STM32KEY flag to enable usage of command stm32key. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> 
Enable CONFIG_CMD_STM32KEY flag to enable usage of command
stm32key.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: stm32mp: Add STM32MP21 support 2026-02-24T16:41:48+00:00 Patrice Chotard patrice.chotard@foss.st.com 2026-02-03T16:49:25+00:00 d557099fb0f1b1b8ae0a415e006c3d517874b8a6 STM32MP21 application processors (STM32 MPUs) based on a single Arm Cortex®-A35 core running up to 1.5 GHz and Cortex®-M33 core running at 300 MHz. It is pin-compatible with the STM32MP2 series in the VFBGA361 10×10 mm package: the STM32MP21 uses a subset of the STM32MP23 pinout, which itself is a subset of the STM32MP25. More details available here : https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> 
STM32MP21 application processors (STM32 MPUs) based on a single
Arm Cortex®-A35 core running up to 1.5 GHz and Cortex®-M33 core
running at 300 MHz.

It is pin-compatible with the STM32MP2 series in the VFBGA361
10×10 mm package: the STM32MP21 uses a subset of the STM32MP23
pinout, which itself is a subset of the STM32MP25.

More details available here :
https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>