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<title>u-boot.git/cpu/arm926ejs/at91, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/cpu/arm926ejs/at91?h=main</id>
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<updated>2010-04-13T07:13:24Z</updated>
<entry>
<title>arm: Move cpu/$CPU to arch/arm/cpu/$CPU</title>
<updated>2010-04-13T07:13:24Z</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2010-04-13T03:28:11Z</published>
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<id>urn:sha1:84ad688473bec2875e171b71040eb9e033c6c206</id>
<content type='text'>
Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</content>
</entry>
<entry>
<title>using AT91_PMC_MCKR_MDIV_ instead of LEGACY one in at91/clock.c</title>
<updated>2010-04-03T20:24:27Z</updated>
<author>
<name>Asen Dimov</name>
<email>dimov@ronetix.at</email>
</author>
<published>2010-03-18T11:46:45Z</published>
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<id>urn:sha1:e99056e3877d1f04a36991aa48f1c690547f5ab9</id>
<content type='text'>
Signed-off-by: Asen Dimov &lt;dimov@ronetix.at&gt;
</content>
</entry>
<entry>
<title>updates the at91 main_clock calculation</title>
<updated>2010-03-07T18:36:36Z</updated>
<author>
<name>Jens Scharsig</name>
<email>js_at_ng@scharsoft.de</email>
</author>
<published>2010-02-14T11:20:43Z</published>
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<id>urn:sha1:7cedb29872069e782f9f97cef4ab1232736e4c85</id>
<content type='text'>
* updates the conditional main_clock calculation (if AT91_MAIN_CLOCK defined) to c structure SoC access
 * add need register flags

Signed-off-by: Jens Scharsig &lt;js_at_ng@scharsoft.de&gt;
</content>
</entry>
<entry>
<title>Add bootcount to AT91</title>
<updated>2010-03-07T18:36:35Z</updated>
<author>
<name>Anders Darander</name>
<email>anders.darander@gmail.com</email>
</author>
<published>2010-02-25T14:57:03Z</published>
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<id>urn:sha1:cade7d9577d4d17f55404b5e60cd5e5b0b605c31</id>
<content type='text'>
Use AT91_GPBR 3 as a bootcount register.
The bootmagic and the bootcount shares AT91_GPBR 3.

Signed-off-by: Anders Darander &lt;ad@datarespons.se&gt;
</content>
</entry>
<entry>
<title>ARM change name of defines for AT91 arm926ejs</title>
<updated>2010-03-07T18:36:35Z</updated>
<author>
<name>Achim Ehrlich</name>
<email>aehrlich@taskit.de</email>
</author>
<published>2010-02-24T09:29:16Z</published>
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<id>urn:sha1:7c966a8bdfdab80cafbfed035d7ae6ea6f58f756</id>
<content type='text'>
Configuration defines should be preceeded with CONFIG_SYS_. Renamed
some at91 specific defines to conform to this naming convention:

AT91_CPU_NAME to CONFIG_SYS_AT91_CPU_NAME
AT91_MAIN_CLOCK to CONFIG_SYS_AT91_MAIN_CLOCK

Signed-off-by: Achim Ehrlich &lt;aehrlich@taskit.de&gt;
</content>
</entry>
<entry>
<title>convert common files to new SoC access</title>
<updated>2010-02-12T18:31:55Z</updated>
<author>
<name>Jens Scharsig</name>
<email>js_at_ng@scharsoft.de</email>
</author>
<published>2010-02-03T21:46:58Z</published>
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<id>urn:sha1:0cf0b93161beb3f3ed5e37e6112aedf15da17e8a</id>
<content type='text'>
* add's a warning to all files, which need update to new SoC access
 * convert common files in cpu/../at91 and a lot of drivers to use
   c stucture SoC access

Signed-off-by: Jens Scharsig &lt;js_at_ng@scharsoft.de&gt;
</content>
</entry>
<entry>
<title>convert all at91 files to use at91_gpio driver syntax</title>
<updated>2010-02-12T18:31:54Z</updated>
<author>
<name>Jens Scharsig</name>
<email>js_at_ng@scharsoft.de</email>
</author>
<published>2010-02-03T21:46:46Z</published>
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<id>urn:sha1:7f9e8633ac9c846e7e4f867507cbd5de1bd99e0c</id>
<content type='text'>
* convert all files cpu/../at91 to use at91_gpio driver syntax
 * change AT91_PINP([A-F])(\d+) to AT91_PIO_PORT\1, \2
   this makes all 160 AT91_PINPxxx defines obsolete
 * AT91_PINPxxx defines and gpio.h can be remove, if all boards converted to new SoC access

Signed-off-by: Jens Scharsig &lt;js_at_ng@scharsoft.de&gt;
</content>
</entry>
<entry>
<title>Generic udelay() with watchdog support</title>
<updated>2009-12-05T00:08:53Z</updated>
<author>
<name>Ingo van Lil</name>
<email>inguin@gmx.de</email>
</author>
<published>2009-11-24T13:09:21Z</published>
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<id>urn:sha1:3eb90bad651fab39cffba750ec4421a9c01d60e7</id>
<content type='text'>
According to the PPC reference implementation the udelay() function is
responsible for resetting the watchdog timer as frequently as needed.
Most other architectures do not meet that requirement, so long-running
operations might result in a watchdog reset.

This patch adds a generic udelay() function which takes care of
resetting the watchdog before calling an architecture-specific
__udelay().

Signed-off-by: Ingo van Lil &lt;inguin@gmx.de&gt;
</content>
</entry>
<entry>
<title>Add support for Eukrea CPU9260/CPU9G20 SBC</title>
<updated>2009-10-13T11:17:35Z</updated>
<author>
<name>Tom Rix</name>
<email>Tom.Rix@windriver.com</email>
</author>
<published>2009-09-27T16:10:09Z</published>
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<id>urn:sha1:23b80982a02a43bf4ead91574c9d6f1b647ccc8f</id>
<content type='text'>
these boards are built around Atmel's AT91SAM9260/9G20 and have
up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND
and include a 10/100 Ethernet PHY in RMII mode.

Signed-off-by: Eric Benard &lt;eric@eukrea.com&gt;
Signed-off-by: Tom Rix &lt;Tom.Rix@windriver.com&gt;
</content>
</entry>
<entry>
<title>Add support for the Calao SBC35-A9G20 board</title>
<updated>2009-09-01T20:13:37Z</updated>
<author>
<name>Albin Tonnerre</name>
<email>albin.tonnerre@free-electrons.com</email>
</author>
<published>2009-08-24T16:03:26Z</published>
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<id>urn:sha1:9453967e28c5e3abbf856f95735ea69bae1e77fa</id>
<content type='text'>
The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems
&lt;http://www.calao-systems.com&gt;. It is built around an AT91SAM9G20 ARM SoC
running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard
battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND
flash, two USB host ports, and an USB device port. More informations can be
found at &lt;http://www.calao-systems.com/articles.php?lng=en&amp;pg=5936&gt;

Signed-off-by: Albin Tonnerre &lt;albin.tonnerre@free-electrons.com&gt;
</content>
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