u-boot.git/cpu/arm_cortexa8, branch master

arm: Move cpu/$CPU to arch/arm/cpu/$CPU

2010-04-13T07:13:24+00:00

Signed-off-by: Peter Tyser

S5PC100: Function to configure the SROMC registers.

2010-04-03T20:24:26+00:00

Nand Flash, Ethernet, other features might need to configure the
SROMC registers accordingly.
The config_sromc() functions helps with this.

Signed-off-by: Naveen Krishna Ch 
Signed-off-by: Minkyu Kang

s5pc1xx: support the GPIO interface

2010-04-03T20:24:25+00:00

This patch adds support the GPIO interface

Signed-off-by: Minkyu Kang

S5PC100: Moves the Macros to a common header file

2010-04-03T20:24:25+00:00

The get_pll_clk(int) API returns the PLL frequency based on
the (int) argument which is defined locally in clock.c

Moving that #define to common header file (clk.h) would
be helpful when using the API from other files.

Signed-off-by: Naveen Krishna Ch 
Signed-off-by: Minkyu Kang

Prepare v2010.03-rc1

2010-03-12T22:06:04+00:00

Coding style cleanup, update CHANGELOG.

Signed-off-by: Wolfgang Denk

MX51: removed warnings for the mx51evk

2010-03-07T18:36:36+00:00

The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
  The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)

Signed-off-by: Stefano Babic

fsl_esdhc: add support for mx51 processor

2010-03-07T18:36:36+00:00

The esdhc controller in the mx51 processor is quite
the same as the one in some powerpc processors
(MPC83xx, MPC85xx). This patches adapts the driver
to support the arm mx51.

Signed-off-by: Stefano Babic

MX51: Add initial support for the Freescale MX51

2010-03-07T18:36:35+00:00

The patch add initial support for the Freescale i.MX51 processor
(family arm cortex_a8).

Signed-off-by: Stefano Babic 
Signed-off-by: Fred Fan

OMAP3: workaround for ARM Cortex-A8 erratum 725233

2010-03-07T18:36:35+00:00

725233: PLD instructions executed with PLD data forwarding
enabled can result in a processor deadlock

This deadlock can happen when NEON load instructions are used together
with cache preload instructions (PLD). The problematic conditions
can be triggered in-the-wild by NEON optimized functions from pixman
library (http://cgit.freedesktop.org/pixman), which perform dynamic
adjustment of prefetch distance.

The workaround disables PLD data forwarding by setting PLD_FWD bit
in L2 Cache Auxiliary Control Register as recommended in ARM Cortex-A8
errata list.

The deadlock can only happen on r1pX revisions of Cortex-A8 (used in
OMAP34xx/OMAP35xx). Performance impact of the workaround is practically
non-existant.

Signed-off-by: Siarhei Siamashka 
Signed-off-by: Sandeep Paulraj

OMAP3: Avoid re-write to PRM_CLKSRC_CTRL

2010-02-12T18:31:54+00:00

In function get_osc_clk_speed(), do not change/ update
the divider for SYS_CLK as it can has cascading effect
on the other derived clocks.

Sudden change in divider value can lead to inconsistent
behavior in the system - often leading to crashes.

The problem was found when working with OMAP3EVM using
DM3730 processor card.

The patch has been tested with OMAP3530 on OMAP3EVM as
well

Signed-off-by: Sanjeev Premi 
Signed-off-by: Hiremath Vaibhav 
Signed-off-by: Sandeep Paulraj