u-boot.git/cpu/at32ap/cpu.c, branch v2009.06

Merge branch 'fixes' into cleanups

2008-12-17T15:53:07+00:00

Conflicts:

	board/atmel/atngw100/atngw100.c
	board/atmel/atstk1000/atstk1000.c
	cpu/at32ap/at32ap700x/gpio.c
	include/asm-avr32/arch-at32ap700x/clk.h
	include/configs/atngw100.h
	include/configs/atstk1002.h
	include/configs/atstk1003.h
	include/configs/atstk1004.h
	include/configs/atstk1006.h
	include/configs/favr-32-ezkit.h
	include/configs/hammerhead.h
	include/configs/mimc200.h

rename CFG_ macros to CONFIG_SYS

2008-10-18T19:54:03+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

avr32: Use board_postclk_init instead of gclk_init

2008-09-01T12:21:34+00:00

Replace the avr32-specific gclk_init() board hook with the standard
board_postclk_init() hook which is supposed to run at the same point
during initialization.

Provide a dummy weak alias for boards not implementing this hook. The
cost of this is:
  - 2 bytes for the dummy function (retal 0)
  - 2 bytes for each unnecessary function call (short rcall)

which is a pretty small price to pay for avoiding lots of #ifdef
clutter. In this particular case, all boards probably end up slightly
smaller because we avoid the conditional checking if the gclk_init
symbol is NULL.

Signed-off-by: Haavard Skinnemoen

Add support for the hammerhead (AVR32) board

2008-07-30T08:06:11+00:00

The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel.  It offers versatile peripherals, such as ethernet, usb
device, usb host etc.

The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).

Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.

For more information see: http:///www.miromico.com/hammerhead

Signed-off-by: Julien May 
[haavard.skinnemoen@atmel.com: various small fixes and adaptions]
Signed-off-by: Haavard Skinnemoen

avr32: Rename pm_init() as clk_init() and make SoC-specific

2008-05-27T13:27:30+00:00

pm_init() was always more about clock initialization than anything
else. Dealing with PLLs, clock gating and such is also inherently
SoC-specific, so move it into a SoC-specific directory.

Signed-off-by: Haavard Skinnemoen

avr32: Get rid of the .flashprog section

2008-05-27T13:27:29+00:00

The .flashprog section was only needed back when we were running
directly from flash, and it's even more useless on NGW100 since it
uses the CFI flash driver which never used this workaround in the
first place.

Remove it on STK1000 as well, and get rid of all the associated code and
annotations.

Signed-off-by: Haavard Skinnemoen

avr32: Disable the AP7000 internal watchdog on startup

2008-05-27T13:27:29+00:00

This patch forces the watchdog off in all cases.  That will at least
get rid of the constant reboot cycle, though it won't let the watchdog
actually run in the new kernels:  its probe() comes up with a polite
warning.

Signed-off-by: Haavard Skinnemoen

AVR32: Resource management rewrite

2007-04-14T13:20:27+00:00

Rewrite the resource management code (i.e. I/O memory, clock gating,
gpio) so it doesn't depend on any global state. This is necessary
because this code is heavily used before relocation to RAM, so we
can't write to any global variables.

As an added bonus, this makes u-boot's memory footprint a bit smaller,
although some functionality has been left out; all clocks are enabled
all the time, and there's no checking for gpio line conflicts.

Signed-off-by: Haavard Skinnemoen

Add AT32AP CPU and AT32AP7000 SoC support

2006-10-24T12:27:35+00:00

Patch by Haavard Skinnemoen, 06 Sep 2006

This patch adds support for the AT32AP CPU family and the AT32AP7000
chip, which is the first chip implementing the AVR32 architecture.

The AT32AP CPU core is a high-performance implementation featuring a
7-stage pipeline, separate instruction- and data caches, and a MMU.
For more information, please see the "AVR32 AP Technical Reference":

http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

In addition to this, the AT32AP7000 chip comes with a large set of
integrated peripherals, many of which are shared with the AT91 series
of ARM-based microcontrollers from Atmel. Full data sheet is
available here:

http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

Signed-off-by: Haavard Skinnemoen