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<title>u-boot.git/cpu/at32ap, branch v1.3.2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>AVR32: Make SDRAM refresh rate configurable</title>
<updated>2008-02-05T11:14:27+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2008-01-23T16:20:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d38da537943cd36356b9d3d9d9b60533554b81d8'/>
<id>d38da537943cd36356b9d3d9d9b60533554b81d8</id>
<content type='text'>
The existing code assumes the SDRAM row refresh period should always
be 15.6 us. This is not always true, and indeed on the ATNGW100, the
refresh rate should really be 7.81 us.

Add a refresh_period member to struct sdram_info and initialize it
properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will
panic() until the refresh_period member is updated properly.

Big thanks to Gerhard Berghofer for pointing out this issue.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
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<pre>
The existing code assumes the SDRAM row refresh period should always
be 15.6 us. This is not always true, and indeed on the ATNGW100, the
refresh rate should really be 7.81 us.

Add a refresh_period member to struct sdram_info and initialize it
properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will
panic() until the refresh_period member is updated properly.

Big thanks to Gerhard Berghofer for pointing out this issue.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>AVR32: Fix wrong pin setup for USART3</title>
<updated>2007-12-17T09:35:02+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2007-11-15T09:03:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9570bcd87f4db255514f43b6701746c412f8fef0'/>
<id>9570bcd87f4db255514f43b6701746c412f8fef0</id>
<content type='text'>
As reported by Gerhard Berghofer:

in "gpio_enable_usart3" the correct pins for USART 3 are PB17 and PB18
instead of PB18 and PB19.

which is obviously correct. There's currently no code that uses
USART3, but custom boards may run into problems.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
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<pre>
As reported by Gerhard Berghofer:

in "gpio_enable_usart3" the correct pins for USART 3 are PB17 and PB18
instead of PB18 and PB19.

which is obviously correct. There's currently no code that uses
USART3, but custom boards may run into problems.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>AVR32: Make some AT32AP700x peripherals optional</title>
<updated>2007-12-17T09:34:12+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2007-10-29T12:23:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5fee84a794a51ec830548cda485a770efb018b92'/>
<id>5fee84a794a51ec830548cda485a770efb018b92</id>
<content type='text'>
Add a chip-features file providing definitions of the form

AT32AP700x_CHIP_HAS_&lt;peripheral&gt;

to indicate the availability of the given peripheral on the currently
selected chip.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</content>
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<pre>
Add a chip-features file providing definitions of the form

AT32AP700x_CHIP_HAS_&lt;peripheral&gt;

to indicate the availability of the given peripheral on the currently
selected chip.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>AVR32: Rename at32ap7000 -&gt; at32ap700x</title>
<updated>2007-12-17T09:34:12+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2007-10-29T12:09:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=36f28f8a9605ee5dcfa330482cfc62171261af97'/>
<id>36f28f8a9605ee5dcfa330482cfc62171261af97</id>
<content type='text'>
The SoC-specific code for all the AT32AP700x CPUs is practically
identical; the only difference is that some chips have less features
than others. By doing this rename, we can add support for the AP7000
derivatives simply by making some features conditional.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</content>
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<pre>
The SoC-specific code for all the AT32AP700x CPUs is practically
identical; the only difference is that some chips have less features
than others. By doing this rename, we can add support for the AP7000
derivatives simply by making some features conditional.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>atmel_mci: Show SR when block read fails</title>
<updated>2007-12-17T09:34:11+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2007-06-29T16:22:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4d5fa99c73f354e7cf985efcf417ea55ca2f6a5e'/>
<id>4d5fa99c73f354e7cf985efcf417ea55ca2f6a5e</id>
<content type='text'>
Show controller status as well as card status when an error occurs
during block read.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</content>
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<pre>
Show controller status as well as card status when an error occurs
during block read.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>atmel_mci: Fix data timeout value</title>
<updated>2007-08-13T15:35:16+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2007-06-29T16:38:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a08458303e7f9db67f296980036d3292c35cb45c'/>
<id>a08458303e7f9db67f296980036d3292c35cb45c</id>
<content type='text'>
Calculate the data timeout based on values from the CSD instead of
just using a hardcoded DTOR value. This is a backport of a similar fix
in BSP 2.0, with one additional fix: the DTOCYC value is rounded up
instead of down.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</content>
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<pre>
Calculate the data timeout based on values from the CSD instead of
just using a hardcoded DTOR value. This is a backport of a similar fix
in BSP 2.0, with one additional fix: the DTOCYC value is rounded up
instead of down.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>AVR32: Include &lt;div64.h&gt; instead of &lt;asm/div64.h&gt;</title>
<updated>2007-08-13T15:22:31+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2007-08-13T15:22:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0ba8eed28b575626b17e0a7882f923b83e0d7584'/>
<id>0ba8eed28b575626b17e0a7882f923b83e0d7584</id>
<content type='text'>
include/asm-avr32/div64.h was recently moved to include/div64.h, but
cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of
the patch was merged perhaps?)

This patch updates cpu/at32ap/interrupts.c so that the avr32 port
compiles again.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</content>
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<pre>
include/asm-avr32/div64.h was recently moved to include/div64.h, but
cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of
the patch was merged perhaps?)

This patch updates cpu/at32ap/interrupts.c so that the avr32 port
compiles again.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>atmel_mci: Use 512 byte blocksize if possible</title>
<updated>2007-08-13T14:33:52+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2007-06-27T11:34:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f0d1246ed7cb5a88522244c596d7ae7e6f161283'/>
<id>f0d1246ed7cb5a88522244c596d7ae7e6f161283</id>
<content type='text'>
Instead of always using the largest blocksize the card supports, check
if it can support smaller block sizes and use 512 bytes if possible.
Most cards do support this, and other parts of u-boot seem to have
trouble with block sizes different from 512 bytes.

Also enable underrun/overrun protection.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
Acked-by: Hans-Christian Egtvedt &lt;hcegtvedt@atmel.com&gt;
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<pre>
Instead of always using the largest blocksize the card supports, check
if it can support smaller block sizes and use 512 bytes if possible.
Most cards do support this, and other parts of u-boot seem to have
trouble with block sizes different from 512 bytes.

Also enable underrun/overrun protection.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
Acked-by: Hans-Christian Egtvedt &lt;hcegtvedt@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge with /home/wd/git/u-boot/custodian/u-boot-avr32; code cleanup.</title>
<updated>2007-04-18T14:53:52+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2007-04-18T14:53:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b99c1e6d8eec327c4b4dd99bf4c0d1a1eba2ce0a'/>
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<pre>
</pre>
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</entry>
<entry>
<title>Atmel MCI driver</title>
<updated>2007-04-14T14:14:06+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2006-01-20T09:03:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fc26c97bb6df41b4a95662c34054fe912387bf38'/>
<id>fc26c97bb6df41b4a95662c34054fe912387bf38</id>
<content type='text'>
Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.

The AT91 ARM-based CPUs use basically the same hardware, so it should
be possible to share this driver, but no effort has been made so far.

Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</content>
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<pre>
Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.

The AT91 ARM-based CPUs use basically the same hardware, so it should
be possible to share this driver, but no effort has been made so far.

Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
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