u-boot.git/cpu/mips/start.S, branch v1.3.3

Allow building mips versions with ELDK 3.1.1

2008-05-05T11:24:12+00:00

.gpword works only with local symbols on certain binutils versions

Signed-off-by: Vlad Lungu

Use jr as register jump instruction

2008-04-18T07:47:29+00:00

Current assembler codes are inconsistent in the way of register jump
instruction usage; some use jr, some use j. Of course GNU as allows both
usages, but as can be expected from `Jump Register' the mnemonic `jr' is
more intuitive than `j'. For example, Linux doesn't have `j ' usage
at all.

Signed-off-by: Shinya Kuribayashi

[MIPS] Cleanup CP0 Status initialization

2008-03-25T12:30:07+00:00

Add setup_c0_status from Linux. For the moment we disable interrupts, set
CU0, mark the kernel mode, and clear ERL and EXL. This is good enough for
reset-time configuration and will work well across most processors.

Signed-off-by: Shinya Kuribayashi

[MIPS] Initialize CP0 Cause before setting up CP0 Status register

2008-03-25T12:30:07+00:00

Without this change, we'll be suffering from deffered WATCH exception
once Status.EXL is cleared. Make sure Cause.WP is cleared.

Signed-off-by: Shinya Kuribayashi

[MIPS] INCA-IP: Move watchdog init code from start.S to lowlevel_init()

2008-03-25T12:30:07+00:00

Move things to appropriate place.

Signed-off-by: Shinya Kuribayashi

[MIPS] Request for the 'mips_cache_lock()' removal

2008-03-25T02:39:29+00:00

The initial intension of having mips_cache_lock() was to use the cache
as memory for temporary stack use so that a C environment can be set up
as early as possible.

But now mips_cache_lock() follow lowlevel_init(). We've already have the
real memory initilaized at this point, therefore we could/should use it.
No reason to lock at all.

Other problems:

Cache locking is not consistent across MIPS implementaions. Some imple-
mentations don't support locking at all. The style of locking varies -
some support per line locking, others per way, etc. Some parts use bits
in status registers instead of cache ops. Current mips_cache_lock() is
not necessarily general-purpose.

And this is worthy of special mention; once U-Boot/MIPS locks the lines,
they are never get unlocked, so the code relies on whatever gets loaded
after U-Boot to re-initialize the cache and clear the locks. We're sup-
posed to have CFG_INIT_RAM_LOCK and unlock_ram_in_cache() implemented,
but leave the situation as it is for a long time.

For these reasons, I proposed the removal of mips_cache_lock() from the
global start-up code.

This patch adds CFG_INIT_RAM_LOCK_MIPS to make existing users aware that
*things have changed*. If he wants the same behavior as before, he needs
to have CFG_INIT_RAM_LOCK_MIPS in his config file.

If we don't have any regression report through several releases, then
we'll remove codes entirely.

Signed-off-by: Shinya Kuribayashi 
Acked-by: Andrew Dyer

[MIPS] Remove useless instructions for initializing $gp.

2007-11-17T11:05:26+00:00

Signed-off-by: Shinya Kuribayashi

[MIPS] MIPS 4K core: Coding style cleanups

2007-11-17T11:05:26+00:00

No logical changes.

Signed-off-by: Shinya Kuribayashi

[MIPS] Fix $gp usage

2007-10-21T01:55:36+00:00

Now we load $gp with _GLOBAL_OFFSET_TABLE_, but this is incorrect use.
As a general principle, we should use _gp for $gp.

Thanks to linker script's help we fortunately have _gp which equals to
_GLOBAL_OFFSET_TABLE_. But once _gp gets out of alignment, we will not
be able to access to GOT entires, global variables and procedure entry
points. The right thing to do is to use _gp.

This patch also introduce a new symbol `.gpword _GLOBAL_OFFSET_TABLE_'
which holds the offset from _gp. When updating GOT entries, we use this
offset and _gp to calculate the final _GLOBAL_OFFSET_TABLE_.

This patch is originally submitted by Vlad Lungu , then
I made some change to leave over num_got_entries.

Signed-off-by: Shinya Kuribayashi 
Cc: Vlad Lungu

Fix U-Boot compilation for MIPS boards using ELDK 4.0

2005-12-01T01:15:07+00:00