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<title>u-boot.git/cpu/mpc83xx/cpu.c, branch v2008.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>mpc83xx: wait till UPM completes the write to array</title>
<updated>2008-10-14T23:10:51+00:00</updated>
<author>
<name>Selvamuthukumar</name>
<email>selva.muthukumar@e-coninfotech.com</email>
</author>
<published>2008-10-09T04:59:14+00:00</published>
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<id>9724555755a6f1066636481b41f7094e0ce93a69</id>
<content type='text'>
Reference manual states that MxMR[MAD] increment is the indication
of write to UPM array is complete. Honour that. Also, make the dummy
write explicit.

also fix the comment.

Signed-off-by: Selvamuthukumar &lt;selva.muthukumar@e-coninfotech.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
Reference manual states that MxMR[MAD] increment is the indication
of write to UPM array is complete. Honour that. Also, make the dummy
write explicit.

also fix the comment.

Signed-off-by: Selvamuthukumar &lt;selva.muthukumar@e-coninfotech.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>Pass in tsec_info struct through tsec_initialize</title>
<updated>2008-09-03T04:18:15+00:00</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2008-08-31T21:33:26+00:00</published>
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<id>75b9d4ae0d69f214eab641caf12ce8af83a39a42</id>
<content type='text'>
The tsec driver contains a hard-coded array of configuration information
for the tsec ethernet controllers.  We create a default function that works
for most tsecs, and allow that to be overridden by board code.  It creates
an array of tsec_info structures, which are then parsed by the corresponding
driver instance to determine configuration.  Also, add regs, miiregs, and
devname fields to the tsec_info structure, so that we don't need the kludgy
"index" parameter.

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
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<pre>
The tsec driver contains a hard-coded array of configuration information
for the tsec ethernet controllers.  We create a default function that works
for most tsecs, and allow that to be overridden by board code.  It creates
an array of tsec_info structures, which are then parsed by the corresponding
driver instance to determine configuration.  Also, add regs, miiregs, and
devname fields to the tsec_info structure, so that we don't need the kludgy
"index" parameter.

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://www.denx.de/git/u-boot-net</title>
<updated>2008-07-09T21:22:54+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2008-07-09T21:22:54+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>Add mechanisms for CPU and board-specific Ethernet initialization</title>
<updated>2008-07-06T07:20:59+00:00</updated>
<author>
<name>Ben Warren</name>
<email>biggerbadderben@gmail.com</email>
</author>
<published>2008-06-24T05:57:27+00:00</published>
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<id>dd35479a50f6c7c31ea491c07c5200c6dfd06a24</id>
<content type='text'>
This patch is the first step in cleaning up net/eth.c, by moving Ethernet
initialization to CPU or board-specific code.  Initial implementation is
only on the Freescale TSEC controller, but others will be added soon.

Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
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<pre>
This patch is the first step in cleaning up net/eth.c, by moving Ethernet
initialization to CPU or board-specific code.  Initial implementation is
only on the Freescale TSEC controller, but others will be added soon.

Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>mpc83xx: move CPU_TYPE_ENTRY over to processor.h</title>
<updated>2008-06-25T21:34:29+00:00</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2008-06-17T22:45:27+00:00</published>
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<id>4890246a2c5df90a74e2941e3673a49bbd36aee9</id>
<content type='text'>
to avoid this:

cpu.c:47:1: warning: "CPU_TYPE_ENTRY" redefined
In file included from cpu.c:33:
/home/kim/git/u-boot/include/asm/processor.h:982:1: warning: this is the location of the previous definition

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
to avoid this:

cpu.c:47:1: warning: "CPU_TYPE_ENTRY" redefined
In file included from cpu.c:33:
/home/kim/git/u-boot/include/asm/processor.h:982:1: warning: this is the location of the previous definition

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) code</title>
<updated>2008-03-28T21:01:06+00:00</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2008-03-28T15:19:07+00:00</published>
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<id>e5c4ade4db1e16d3e5d4a7887f34e10e516ed3a9</id>
<content type='text'>
in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display.  Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler.  Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
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<pre>
in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display.  Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler.  Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc83xx: convert to using do_fixup_*()</title>
<updated>2008-01-08T15:56:42+00:00</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2007-12-20T20:09:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5b8bc606c61456566af6912f818a153b6b06f242'/>
<id>5b8bc606c61456566af6912f818a153b6b06f242</id>
<content type='text'>
convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add support CONFIG_UEC_ETH3 in MPC83xx</title>
<updated>2008-01-08T15:55:41+00:00</updated>
<author>
<name>Joakim Tjernlund</name>
<email>Joakim.Tjernlund@transmode.se</email>
</author>
<published>2007-12-06T15:43:40+00:00</published>
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<id>ccf21c311e68d48399eff1e72936052885f6e3f7</id>
<content type='text'>
Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
</content>
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<pre>
Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
</pre>
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</content>
</entry>
<entry>
<title>mpc83xx: Add the support of MPC8315E SoC</title>
<updated>2008-01-08T15:55:39+00:00</updated>
<author>
<name>Dave Liu</name>
<email>r63238@freescale.com</email>
</author>
<published>2007-09-18T04:36:58+00:00</published>
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<id>555da61702771fe0f76f3de23b4e7590f3704161</id>
<content type='text'>
The MPC8315E SoC including e300c3 core and new IP blocks,
such as TDM, PCI Express and SATA controller.

Signed-off-by: Dave Liu &lt;daveliu@freescale.com&gt;
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<pre>
The MPC8315E SoC including e300c3 core and new IP blocks,
such as TDM, PCI Express and SATA controller.

Signed-off-by: Dave Liu &lt;daveliu@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc83xx: Add the support of MPC837x SoC</title>
<updated>2008-01-08T15:55:39+00:00</updated>
<author>
<name>Dave Liu</name>
<email>r63238@freescale.com</email>
</author>
<published>2007-09-18T04:36:11+00:00</published>
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<id>03051c3d35c9981ceaa059005660e699f3eacf1c</id>
<content type='text'>
The MPC837x SoC including e300c4 core and new IP blocks,
such as SDHC, PCI Express and SATA controller.

Signed-off-by: Dave Liu &lt;daveliu@freescale.com&gt;
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<pre>
The MPC837x SoC including e300c4 core and new IP blocks,
such as SDHC, PCI Express and SATA controller.

Signed-off-by: Dave Liu &lt;daveliu@freescale.com&gt;
</pre>
</div>
</content>
</entry>
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