u-boot.git/cpu/mpc83xx/start.S, branch v2009.11.1

relocation: Do not relocate NULL pointers.

2009-10-08T07:33:36Z

NULL is an absolute value and should not be relocated. After this correction code like: void weak_fun(void) __attribute__((weak)); printf("weak_fun:%p\n", weak_fun); will still print null after relocation. Signed-off-by: Joakim Tjernlund

83xx: Use the proper sequence for updating IMMR.

2009-01-22T00:43:57Z

This ensures that subsequent accesses properly hit the new window. The dcbi during the NAND loop was accidentally working around this; it's no longer necessary, as the cache is not enabled. Reported-by: Suchit Lepcha Signed-off-by: Scott Wood Signed-off-by: Kim Phillips

mpc83xx: Size optimization of start.S

2009-01-22T00:43:49Z

Currently there are in excess of 100 bytes located at the beginning of the image built by start.S that are not being utilized. This patch moves a few functions into this part of the image. This will create a greater number of *available* bytes that can be used by board specific code in NAND builds and will decrease the size of the assembled code in other builds. Signed-off-by: Ron Madrid Signed-off-by: Kim Phillips

Update U-Boot's build timestamp on every compile

2008-12-06T22:36:43Z

Use the GNU 'date' command to auto-generate a new U-Boot timestamp on every compile. Signed-off-by: Peter Tyser

Merge 'next' branch

2008-10-18T19:59:44Z

Conflicts: board/freescale/mpc8536ds/mpc8536ds.c include/configs/mgcoge.h Signed-off-by: Wolfgang Denk

rename CFG_ macros to CONFIG_SYS

2008-10-18T19:54:03Z

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

83xx NAND boot: wait for LTESR[CC]

2008-10-17T15:39:18Z

At least some revisions of the 8313, and possibly other chips, do not wait for all pages of the initial 4K NAND region to be loaded before beginning execution; thus, we wait for it before branching out of the first NAND page. This fixes warm reset problems when booting from NAND on 8313erdb. Signed-off-by: Scott Wood Acked-by: Kim Phillips

mpc83xx: clean up cache operations and unlock_ram_in_cache() functions

2008-09-03T21:07:00Z

Cleans up some latent issues with the data cache control so that dcache_enable() and dcache_disable() will work reliably (after unlock_ram_in_cache() has been called) Signed-off-by: Nick Spence Signed-off-by: Kim Phillips

mpc83xx: Store and display Arbiter Event Register values

2008-09-03T21:06:57Z

Record the Arbiter Event Register values and optionally display them. The Arbiter Event Register can record the type and effective address of an arbiter error, even through an HRESET. This patch stores the values in the global data structure. Display of the Arbiter Event registers immediately after the RSR value can be enabled with defines. The Arbiter values will only be displayed if an arbiter event has occured since the last Power On Reset, and either of the following defines exist: #define CONFIG_DISPLAY_AER_BRIEF - display only the arbiter address and and type register values #define CONFIG_DISPLAY_AER_FULL - display and interpret the arbiter event register values Address Only transactions are one of the trapped events that can register as an arbiter event. They occur with some cache manipulation instructions if the HID0_ABE (Address Broadcast Enable) is set and the memory region has the MEMORY_COHERENCE WIMG bit set. Setting: #define CONFIG_MASK_AER_AO - prevents the arbiter from recording address only events, so that it can still capture other real problems. Signed-off-by: Nick Spence Signed-off-by: Kim Phillips

mpc83xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache

2008-09-03T21:06:51Z

This is needed in unlock_ram_in_cache() because it is called from C and will corrupt the small data area anchor that is kept in R2. lock_ram_in_cache() is modified similarly as good coding practice, but is not called from C. Signed-off-by: Nick Spence Signed-off-by: Kim Phillips