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<title>u-boot.git/cpu/mpc83xx, branch LABEL_2006_06_30_2020</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/cpu/mpc83xx?h=LABEL_2006_06_30_2020</id>
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<updated>2006-04-20T18:45:32Z</updated>
<entry>
<title>Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port:</title>
<updated>2006-04-20T18:45:32Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2006-04-20T18:45:32Z</published>
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<id>urn:sha1:8fe9bf61efa6cab617dc99dfc5413e47f2ef969f</id>
<content type='text'>
  - Removed MPC8349ADS port
  - Added PCI support to MPC8349ADS
  - reworked memory map to allow mapping of all regions with BATs
  Patch by Kumar Gala 20 Apr 2006

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>Some code cleanup</title>
<updated>2006-04-16T08:51:58Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2006-04-16T08:51:58Z</published>
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<id>urn:sha1:cf48eb9abd76e5a056937a4e49be094826026abc</id>
<content type='text'>
</content>
</entry>
<entry>
<title>GCC-4.x fixes: clean up global data pointer initialization for all boards.</title>
<updated>2006-03-31T16:32:53Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2006-03-31T16:32:53Z</published>
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<id>urn:sha1:d87080b721e4f8dca977af7571c5338ae7bb8db7</id>
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</content>
</entry>
<entry>
<title>Support for DDR with 32-data path. Addotional notes on injecting</title>
<updated>2006-03-16T16:46:46Z</updated>
<author>
<name>Rafal Jaworowski</name>
<email>raj@pollux.denx.de</email>
</author>
<published>2006-03-16T16:46:46Z</published>
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<id>urn:sha1:dc9e499c620a590e0f906e807e24c85807af3338</id>
<content type='text'>
multiple-bit errors.
</content>
</entry>
<entry>
<title>Add support for ECC DDR initialization on MPC83xx.</title>
<updated>2006-03-14T15:23:35Z</updated>
<author>
<name>Marian Balakowicz</name>
<email>m8@semihalf.com</email>
</author>
<published>2006-03-14T15:23:35Z</published>
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<id>urn:sha1:4c8d1ecce23b848dee028d223551a8867de627ff</id>
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</content>
</entry>
<entry>
<title>Add DMA support for MPC83xx.</title>
<updated>2006-03-14T15:14:48Z</updated>
<author>
<name>Marian Balakowicz</name>
<email>m8@semihalf.com</email>
</author>
<published>2006-03-14T15:14:48Z</published>
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<id>urn:sha1:61f25155acd99caef08897da390382d5c7fbfd74</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Add sync in do_reset() routine for MPC83xx after RPR register</title>
<updated>2006-03-14T15:12:48Z</updated>
<author>
<name>Marian Balakowicz</name>
<email>m8@semihalf.com</email>
</author>
<published>2006-03-14T15:12:48Z</published>
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<id>urn:sha1:6d8ae5abb5311bd8e306a5a060dcfbeb0874a169</id>
<content type='text'>
was written to. It is need on some targets when BAT translation
is enabled.
</content>
</entry>
<entry>
<title>Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx.</title>
<updated>2006-03-14T15:02:31Z</updated>
<author>
<name>Marian Balakowicz</name>
<email>m8@semihalf.com</email>
</author>
<published>2006-03-14T15:02:31Z</published>
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</content>
</entry>
<entry>
<title>Correct shift offsets in icache_status and dcache_status for MPC83xx.</title>
<updated>2006-03-14T15:01:25Z</updated>
<author>
<name>Marian Balakowicz</name>
<email>m8@semihalf.com</email>
</author>
<published>2006-03-14T15:01:25Z</published>
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</entry>
<entry>
<title>Merge with git://git.kernel.org/pub/scm/boot/u-boot/u-boot.git#mpc83xx</title>
<updated>2006-03-12T20:33:52Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2006-03-12T20:33:52Z</published>
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