u-boot.git/cpu/mpc83xx, branch v2009.06

83xx: searching "muram-data" by compatible property

2009-04-24T19:38:45+00:00

if using CONFIG_BOOTCOUNT_LIMIT feature on a MPC8360 CPU
in the muram-data node, the reg entry needs to be updated.
This is done in fdt_fixup_muram(), but we should use
the compatible "fsl,qe-muram-data" for searching the
node instead of searching the muram-data node with
an absolute path.

Signed-off-by: Heiko Schocher 
Signed-off-by: Kim Phillips

Fix all linker script to handle all rodata sections

2009-03-20T21:39:12+00:00

A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho

mpc83xx: Add bank configuration to FSL spd_sdram.c

2009-03-14T22:44:07+00:00

The routine assumed 4 bank SDRAMs, enhance to configure for 4 or 8
bank SDRAMs.

Signed-off-by: Gerald Van Baren 
Acked-by: Dave Liu 
Signed-off-by: Kim Phillips

mpc83xx: correctly set encryption and I2C bus 0 clock

2009-03-14T22:43:58+00:00

This patch makes sure the correct mask is applied when setting
the encryption and I2C bus 0 clock in SCCR.
Failing to do so may lead to ENCCM being 0 in which case I2C bus 0
won't function.

Signed-off-by: Norbert van Bolhuis 
Signed-off-by: Kim Phillips

8360, kmeter1: added bootcount feature.

2009-03-06T00:21:30+00:00

add CONFIG_BOOTCOUNT_LIMIT feature for 8360 CPU.

The bootcounter uses 8 bytes from the muram,
because no other memory was found on this
CPU for the bootcount feature. So we must
correct the muram size in DTS before booting
Linux.

This feature is actual only implemented for
MPC8360, because not all 83xx CPU have qe,
and therefore no muram, which this feature
uses.

Signed-off-by: Heiko Schocher 
Signed-off-by: Kim Phillips

83xx: Fix some bugs in spd sdram code

2009-03-06T00:20:37+00:00

1. RD_TO_PRE missed to add the AL, and need min 2 clocks for
  tRTP according to DDR2 JEDEC spec.
2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec.
3. add the support of DDR2-533,667,800 DIMMs
4. cpo
5. make the AL to min to gain better performance.

The Micron MT9HTF6472CHY-667D1 DIMMs test passed on
MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate.

items 1, 2 and 5:
Acked-by: Joakim Tjernlund 

Reported-by: Joakim Tjernlund 
Signed-off-by: Dave Liu 
Signed-off-by: Kim Phillips

mpc83xx: PCI: Fix hard-coded first_busno value

2009-02-23T21:52:23+00:00

We should use pci_last_busno() in pci_init_bus(), otherwise we'll
erroneously re-use PCI0's first_busno for PCI1 hoses.

NOTE: The patch is untested. All MPC83xx FSL boards I have have
PCI1 in miniPCI form, for which I don't have any cards handy.

But looking in cpu/mpc85xx/pci.c:
...
#ifdef CONFIG_MPC85XX_PCI2
        hose = &pci_hose[1];

        hose->first_busno = pci_hose[0].last_busno + 1;

And considering that we do the same for MPC83xx PCI-E support,
I think this patch is correct.

Signed-off-by: Anton Vorontsov 
Signed-off-by: Kim Phillips

mpc83xx: PCI: Fix bus-range fdt fixups for PCI1 controllers

2009-02-23T21:52:12+00:00

This patch fixes copy-paste issue: pci_hose[0]'s first and last
busnos were used to fixup pci1's nodes.

We don't see this bug triggering only because Linux reenumerate
buses anyway.

Signed-off-by: Anton Vorontsov 
Signed-off-by: Kim Phillips

mpc83xx: PCIe: Fix CONFIG_PCI_SCAN_SHOW reporting bogus values

2009-02-23T21:51:59+00:00

This patch fixes an issue in config space read accessors: we should
fill-in the value even if we fail (e.g. skipping devices), otherwise
CONFIG_PCI_SCAN_SHOW reports bogus values during boot up.

Signed-off-by: Anton Vorontsov 
Signed-off-by: Kim Phillips

mpc83xx: PCIe: Don't start bus enumeration at 0

2009-02-23T21:51:35+00:00

Currently we assign first_busno = 0 for the first PCIe hose, but this
scheme won't work if we have ordinary PCI hose already registered (its
first_busno value is 0 too).

The old code worked fine only because we have PCI disabled on
MPC837XEMDS boards in stand-alone mode (see commit 00f7bbae92e3b13f2b3
"mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards").
But on MPC837XERDB boards we have PCI and PCIe, so the bug actually
triggers.

So, to fix the issue, we should use pci_last_busno() + 1 for the
first_busno (i.e. last available busno).

Reported-by: Huang Changming 
Signed-off-by: Anton Vorontsov 
Signed-off-by: Kim Phillips