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<title>u-boot.git/cpu/mpc83xx, branch v2009.11</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>mpc83xx: boot time regression, move LCRR setup back to cpu_init_f</title>
<updated>2009-12-09T17:40:52+00:00</updated>
<author>
<name>Peter Korsgaard</name>
<email>jacmet@sunsite.dk</email>
</author>
<published>2009-12-08T21:20:34+00:00</published>
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<id>3b887ca8ce72cc12129183538f6e828db13f4867</id>
<content type='text'>
Commit c7190f02 (retain POR values of non-configured ACR, SPCR, SCCR,
and LCRR bitfields) moved the LCRR assignment to after relocation
to RAM because of the potential problem with changing the local bus
clock while executing from flash.

This change unfortunately adversely affects the boot time, as running
all code up to cpu_init_r can cause significant slowdown.

E.G. on a 8347 board a bootup time increase of ~600ms has been observed:

   0.020 CPU:   e300c1, MPC8347_PBGA_EA, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz
   0.168 RS:    232
   0.172 I2C:   ready
   0.176 DRAM:  64 MB
   1.236 FLASH: 32 MB

Versus:

   0.016 CPU:   e300c1, MPC8347_PBGA_EA, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz
   0.092 RS:    232
   0.092 I2C:   ready
   0.096 DRAM:  64 MB
   0.644 FLASH: 32 MB

So far no boards have needed the late LCRR setup, so simply revert it
for now - If it is needed at a later time, those boards can either do
their own final LCRR setup in board code (E.G. in board_early_init_r),
or we can introduce a CONFIG_SYS_LCRR_LATE config option to only do
the setup in cpu_init_r.

Signed-off-by: Peter Korsgaard &lt;jacmet@sunsite.dk&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
Commit c7190f02 (retain POR values of non-configured ACR, SPCR, SCCR,
and LCRR bitfields) moved the LCRR assignment to after relocation
to RAM because of the potential problem with changing the local bus
clock while executing from flash.

This change unfortunately adversely affects the boot time, as running
all code up to cpu_init_r can cause significant slowdown.

E.G. on a 8347 board a bootup time increase of ~600ms has been observed:

   0.020 CPU:   e300c1, MPC8347_PBGA_EA, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz
   0.168 RS:    232
   0.172 I2C:   ready
   0.176 DRAM:  64 MB
   1.236 FLASH: 32 MB

Versus:

   0.016 CPU:   e300c1, MPC8347_PBGA_EA, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz
   0.092 RS:    232
   0.092 I2C:   ready
   0.096 DRAM:  64 MB
   0.644 FLASH: 32 MB

So far no boards have needed the late LCRR setup, so simply revert it
for now - If it is needed at a later time, those boards can either do
their own final LCRR setup in board code (E.G. in board_early_init_r),
or we can introduce a CONFIG_SYS_LCRR_LATE config option to only do
the setup in cpu_init_r.

Signed-off-by: Peter Korsgaard &lt;jacmet@sunsite.dk&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>mpc83xx: mpc8313 - handle erratum IPIC1 (TSEC IRQ number swappage)</title>
<updated>2009-10-16T22:08:35+00:00</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2009-10-12T16:06:19+00:00</published>
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<id>7120c888101952b7e61b9e54bb42370904aa0e68</id>
<content type='text'>
mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
h/w (see AN3545).  The base device tree in use has rev. 1 ID numbers,
so if on Rev. 2 (and higher) h/w, we fix them up here.

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Reviewed-by: Roland Lezuo &lt;roland.lezuo@chello.at&gt;
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<pre>
mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
h/w (see AN3545).  The base device tree in use has rev. 1 ID numbers,
so if on Rev. 2 (and higher) h/w, we fix them up here.

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Reviewed-by: Roland Lezuo &lt;roland.lezuo@chello.at&gt;
</pre>
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</content>
</entry>
<entry>
<title>relocation: Do not relocate NULL pointers.</title>
<updated>2009-10-08T07:33:36+00:00</updated>
<author>
<name>Joakim Tjernlund</name>
<email>Joakim.Tjernlund@transmode.se</email>
</author>
<published>2009-10-08T00:03:51+00:00</published>
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<content type='text'>
NULL is an absolute value and should not be relocated.
After this correction code like:
 void weak_fun(void) __attribute__((weak));
 printf("weak_fun:%p\n", weak_fun);
will still print null after relocation.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
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<pre>
NULL is an absolute value and should not be relocated.
After this correction code like:
 void weak_fun(void) __attribute__((weak));
 printf("weak_fun:%p\n", weak_fun);
will still print null after relocation.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
</pre>
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</content>
</entry>
<entry>
<title>ppc: Enable full relocation to RAM</title>
<updated>2009-10-03T08:15:45+00:00</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2009-09-21T16:20:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=858290178f222d998b6425d85cf06822467918f3'/>
<id>858290178f222d998b6425d85cf06822467918f3</id>
<content type='text'>
The following changes allow U-Boot to fully relocate from flash to
RAM:
 - Remove linker scripts' .fixup sections from the .text section
 - Add -mrelocatable to PLATFORM_RELFLAGS for all boards
 - Define CONFIG_RELOC_FIXUP_WORKS for all boards

Previously, U-Boot would partially relocate, but statically initialized
pointers needed to be manually relocated.

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
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<pre>
The following changes allow U-Boot to fully relocate from flash to
RAM:
 - Remove linker scripts' .fixup sections from the .text section
 - Add -mrelocatable to PLATFORM_RELFLAGS for all boards
 - Define CONFIG_RELOC_FIXUP_WORKS for all boards

Previously, U-Boot would partially relocate, but statically initialized
pointers needed to be manually relocated.

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields</title>
<updated>2009-09-27T02:19:38+00:00</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2009-09-25T23:19:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c7190f028fa950d4d36b6d0b4bb3fc72602ec54c'/>
<id>c7190f028fa950d4d36b6d0b4bb3fc72602ec54c</id>
<content type='text'>
some LCRR bits are not documented throughout the 83xx family RMs.
New board porters copying similar board configurations might omit
setting e.g., DBYP since it was not documented in their SoC's RM.

Prevent them bricking their board by retaining power on reset values
in bit fields that the board porter doesn't explicitly configure
via CONFIG_SYS_&lt;registername&gt;_&lt;bitfield&gt; assignments in the board
config file.

also move LCRR assignment to cpu_init_r[am] to help ensure no
transactions are being executed via the local bus while CLKDIV is being
modified.

also start to use i/o accessors.

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
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<pre>
some LCRR bits are not documented throughout the 83xx family RMs.
New board porters copying similar board configurations might omit
setting e.g., DBYP since it was not documented in their SoC's RM.

Prevent them bricking their board by retaining power on reset values
in bit fields that the board porter doesn't explicitly configure
via CONFIG_SYS_&lt;registername&gt;_&lt;bitfield&gt; assignments in the board
config file.

also move LCRR assignment to cpu_init_r[am] to help ensure no
transactions are being executed via the local bus while CLKDIV is being
modified.

also start to use i/o accessors.

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc83xx/serdes: License cleanup: remove "All Rights Reserved" notice</title>
<updated>2009-09-04T21:02:04+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2009-09-02T13:58:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=001d615681333569c555e6cde07d8d23e2c536fb'/>
<id>001d615681333569c555e6cde07d8d23e2c536fb</id>
<content type='text'>
"All Rights Reserved" conflicts with the GPL.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
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<pre>
"All Rights Reserved" conflicts with the GPL.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>Update Freescale copyrights to remove "All Rights Reserved"</title>
<updated>2009-07-29T07:59:22+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>kumar.gala@freescale.com</email>
</author>
<published>2009-07-29T02:49:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4c2e3da82dc2b7f8b39b7f1d57f570e4bc5caa6d'/>
<id>4c2e3da82dc2b7f8b39b7f1d57f570e4bc5caa6d</id>
<content type='text'>
"All Rights Reserved" conflicts with the GPL.

Signed-off-by: Kumar Gala &lt;kumar.gala@freescale.com&gt;
</content>
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<pre>
"All Rights Reserved" conflicts with the GPL.

Signed-off-by: Kumar Gala &lt;kumar.gala@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>mpc83xx: CONFIG_83XX_GENERIC_PCI is now synonymous with CONFIG_PCI; remove the former</title>
<updated>2009-07-27T15:17:54+00:00</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2009-07-23T19:09:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=be9b56df02168ca97562d6b9ec791136e4cd925a'/>
<id>be9b56df02168ca97562d6b9ec791136e4cd925a</id>
<content type='text'>
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
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<pre>
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>usb: mpc834x: added support of the MPH USB controller in addition to the DR one</title>
<updated>2009-07-14T19:53:52+00:00</updated>
<author>
<name>Valeriy Glushkov</name>
<email>gvv@lstec.com</email>
</author>
<published>2009-06-30T12:48:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d89e1c36891de793a20a929282acc0fc7b98feac'/>
<id>d89e1c36891de793a20a929282acc0fc7b98feac</id>
<content type='text'>
Signed-off-by: Valeriy Glushkov &lt;gvv@lstec.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
Signed-off-by: Valeriy Glushkov &lt;gvv@lstec.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc83xx: USB: fix: access of ehci struct elements</title>
<updated>2009-07-09T19:33:15+00:00</updated>
<author>
<name>Vivek Mahajan</name>
<email>vivek.mahajan@freescale.com</email>
</author>
<published>2009-06-24T04:38:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=db7b43e4681f6f93c336132708157a8a0cca1f8b'/>
<id>db7b43e4681f6f93c336132708157a8a0cca1f8b</id>
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It fixes the access to the 'ehci' struct elements for mpc83xx which
should have been taken care of in 4ef01010aa4799c759d75e67007fdd3a38c88c8a
Sorry about that.

Signed-off-by: Vivek Mahajan &lt;vivek.mahajan@freescale.com&gt;
Signed-off-by: Remy Bohmer &lt;linux@bohmer.net&gt;
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<pre>
It fixes the access to the 'ehci' struct elements for mpc83xx which
should have been taken care of in 4ef01010aa4799c759d75e67007fdd3a38c88c8a
Sorry about that.

Signed-off-by: Vivek Mahajan &lt;vivek.mahajan@freescale.com&gt;
Signed-off-by: Remy Bohmer &lt;linux@bohmer.net&gt;
</pre>
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