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<title>u-boot.git/cpu/mpc85xx/Makefile, branch v2009.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/cpu/mpc85xx/Makefile?h=v2009.01</id>
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<updated>2008-08-27T16:43:54Z</updated>
<entry>
<title>mpc85xx: Add support for the MPC8536</title>
<updated>2008-08-27T16:43:54Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-08-12T16:14:19Z</published>
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<id>urn:sha1:ef50d6c06ece74fb17e8d7510e62cad9df8b810d</id>
<content type='text'>
The MPC8536 Adds SDHC and SATA controllers to the PQ3 family.  We
also have SERDES init code for the 8536.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Signed-off-by: Srikanth Srinivasan &lt;srikanth.srinivasan@freescale.com&gt;
Signed-off-by: Dejan Minic &lt;minic@freescale.com&gt;
Signed-off-by: Jason Jin &lt;Jason.jin@freescale.com&gt;
Signed-off-by: Dave Liu &lt;daveliu@freescale.com&gt;
</content>
</entry>
<entry>
<title>FSL DDR: Remove old SPD support from cpu/mpc85xx</title>
<updated>2008-08-27T16:43:53Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-08-27T06:05:35Z</published>
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<id>urn:sha1:457caecdbca3df21a93abff19eab12dbc61b7897</id>
<content type='text'>
All 85xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>FSL DDR: Add 85xx specific register setting</title>
<updated>2008-08-27T16:43:48Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-08-27T02:34:55Z</published>
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<id>urn:sha1:2a6c2d7ab2a66660f40a6cd3de2eb29ee29d9693</id>
<content type='text'>
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.</title>
<updated>2008-08-27T00:05:58Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-08-26T20:01:29Z</published>
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<id>urn:sha1:58e5e9aff147e8c7e2bc1406bf9384f65f020ffa</id>
<content type='text'>
The main purpose of this rewrite it to be able to share the same
initialization code on all FSL PowerPC products that have DDR
controllers.  (83xx, 85xx, 86xx).

The code is broken up into the following steps:
	GET_SPD
	COMPUTE_DIMM_PARMS
	COMPUTE_COMMON_PARMS
	GATHER_OPTS
	ASSIGN_ADDRESSES
	COMPUTE_REGS
	PROGRAM_REGS

This allows us to share more code an easily allow for board specific code
overrides.

Additionally this code base adds support for &gt;4G of DDR and provides a
foundation for supporting interleaving on processors with more than one
controller.

Signed-off-by: James Yang &lt;James.Yang@freescale.com&gt;
Signed-off-by: Jon Loeliger &lt;jdl@freescale.com&gt;
Signed-off-by: Becky Bruce &lt;becky.bruce@freescale.com&gt;
Signed-off-by: Ed Swarthout &lt;Ed.Swarthout@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>85xx: Added support for multicore boot mechanism</title>
<updated>2008-03-26T16:43:03Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-01-17T22:48:33Z</published>
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<id>urn:sha1:ec2b74ffd36f02c6123725e7c2533dd2deaf4b64</id>
<content type='text'>
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.

Added support for using the ePAPR defined spin-table mechanism on 85xx.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>85xx: Introduce new tlb API</title>
<updated>2008-01-17T08:04:07Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-01-17T04:33:22Z</published>
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<id>urn:sha1:44a23cfd6360a68eaa41f945190618a55519eac3</id>
<content type='text'>
Add a set of functions to manipulate TLB entries:
 * set_tlb() - write a tlb entry
 * invalidate_tlb() - invalidate a tlb array
 * disable_tlb() - disable a variable size tlb entry
 * init_tlbs() - setup initial tlbs based on static table

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>Add libfdt based ft_cpu_setup for mpc85xx</title>
<updated>2007-12-12T04:34:19Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2007-11-29T06:15:30Z</published>
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<id>urn:sha1:f852ce72f100cabd1f11c21c085a0ad8eca9fb65</id>
<content type='text'>
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>Add support for UEC to 8568</title>
<updated>2007-08-14T06:47:44Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2007-08-14T05:14:25Z</published>
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<id>urn:sha1:da9d4610d76e52c4d20a8f3d8433439a7fcf5b71</id>
<content type='text'>
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
</entry>
<entry>
<title>Converted all 85xx boards to use a common FSL I2C driver.</title>
<updated>2006-10-20T20:50:15Z</updated>
<author>
<name>Jon Loeliger</name>
<email>jdl@freescale.com</email>
</author>
<published>2006-10-20T20:50:15Z</published>
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<id>urn:sha1:2047672684cf85cb6f96a1fbc993180aaaf19a99</id>
<content type='text'>
Introduced COFIG_FSL_I2C to select the common FSL I2C driver.
And removed hard i2c path from a few u-boot.lds scipts too.
Minor whitespace cleanups along the way.

Signed-off-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</content>
</entry>
<entry>
<title>Move "ar" flags to config.mk to allow for silent "make -s"</title>
<updated>2006-10-08T23:02:05Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@atlas.denx.de</email>
</author>
<published>2006-10-08T23:02:05Z</published>
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<id>urn:sha1:2b208f5308ae0c72a6840180e59ed1ab4f9b69fc</id>
<content type='text'>
Based on patch by Mike Frysinger, 20 Jun 2006
</content>
</entry>
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