u-boot.git/cpu/mpc85xx/cpu.c, branch v1.3.0-rc2Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/cpu/mpc85xx/cpu.c?h=v1.3.0-rc22007-08-14T06:47:44ZAdd support for UEC to 85682007-08-14T06:47:44ZAndy Flemingafleming@freescale.com2007-08-14T05:14:25Zurn:sha1:da9d4610d76e52c4d20a8f3d8433439a7fcf5b71
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx2007-05-16T22:07:21ZKim Phillipskim.phillips@freescale.com2007-05-16T21:52:19Zurn:sha1:255a3577c848706441daee0174543efe205a77f8
For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Coding stylke cleanup; update CHANGELOG.2007-05-05T16:23:11ZWolfgang Denkwd@denx.de2007-05-05T16:23:11Zurn:sha1:2f15278c2eb911c668b4fe562130b78cf554d139
Signed-off-by: Wolfgang Denk <wd@denx.de>
Add support for the 8568 MDS board2007-05-02T20:50:02ZAndy Flemingafleming@freescale.com2007-04-23T07:54:25Zurn:sha1:6743105988fc44d5b0d30388c790607835aae7a6
This included some changes to common files:
* Add 8568 processor SVR to various places
* Add support for setting the qe bus-frequency value in the dts
* Add the 8568MDS target to the Makefile
Signed-off-by: Andy Fleming <afleming@freescale.com>
85xx: write MAC address to mac-address and local-mac-address2007-04-24T00:58:28ZTimur Tabitimur@freescale.com2007-02-12T19:34:55Zurn:sha1:85e7c7a45e3dd9c7ce3e722352ba60f8df1a7a4b
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
Some 85xx cpu cleanups2007-04-24T00:58:28ZAndy Flemingafleming@freescale.com2007-04-23T06:44:44Zurn:sha1:03b81b48eec0ad249ec97a4ae16c36fa2e014ff4
* Cleaned up the TSR[WIS] clearing
* Cleaned up DMA initialization
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Add cpu support for the 85442007-04-24T00:58:28ZAndy Flemingafleming@freescale.com2007-04-23T06:32:22Zurn:sha1:151d5d992eab8c497b24c816c73dc1ad8bffb4eb
Recognize new SVR values, and add a few register definitions
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
u-boot: Fix e500 v2 core reset bug2007-04-24T00:58:27ZZang Roy-r61911tie-fei.zang@freescale.com2006-12-05T08:42:30Zurn:sha1:96629cbabdb727d4a5e62542deefc01d498db6dc
The following patch fixes the e500 v2 core reset bug.
For e500 v2 core, a new reset control register is added to reset the
processor.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
* Add Flat Dev Tree construction for MPC85xx ADS and CDS boards2006-06-28T15:43:36ZMatthew McClintockmsm@freescale.com2006-06-28T15:43:36Zurn:sha1:40d5fa35d02df22580593bf0039ab173367e8ef0
Patch by Jon Loeliger 17-Jan-2006
Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Patch by Jon Loeliger, 2005-05-052005-07-25T19:05:07ZJon Loeligerjdl@freescale.com2005-07-25T19:05:07Zurn:sha1:d9b94f28a442b0013caef99de084d7b72e2d4607
Implemented support for MPC8548CDS board.
Added DDR II support based on SPD values for MPC85xx boards.
This roll-up patch also includes bugfies for the previously
published patches:
DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O