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<title>u-boot.git/cpu/mpc85xx/cpu.c, branch v1.3.3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>85xx: Round up frequency calculations to get reasonable output</title>
<updated>2008-04-24T13:42:35+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-04-21T14:28:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=022f12163595b9a55380c6d77c3119b93d6a9a4b'/>
<id>022f12163595b9a55380c6d77c3119b93d6a9a4b</id>
<content type='text'>
eg. because of rounding error we can get 799Mhz instead of 800Mhz.

Introduced DIV_ROUND_UP and roundup taken from linux kernel.

Signed-off-by: Dejan Minic &lt;minic@freescale.com&gt;
Signed-off-by: Srikanth Srinivasan &lt;srikanth.srinivasan@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
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<pre>
eg. because of rounding error we can get 799Mhz instead of 800Mhz.

Introduced DIV_ROUND_UP and roundup taken from linux kernel.

Signed-off-by: Dejan Minic &lt;minic@freescale.com&gt;
Signed-off-by: Srikanth Srinivasan &lt;srikanth.srinivasan@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>85xx: Show DDR memory data rate in addition to the memory clock frequency.</title>
<updated>2008-03-26T16:43:04+00:00</updated>
<author>
<name>James Yang</name>
<email>James.Yang@freescale.com</email>
</author>
<published>2008-02-08T22:46:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e9ea679918fbc9a53fa2f2a904aac874ea736036'/>
<id>e9ea679918fbc9a53fa2f2a904aac874ea736036</id>
<content type='text'>
Show the DDR memory data rate in addition to the memory clock
frequency.  For DDR/DDR2 memories the memory data rate is 2x the
memory clock.

Signed-off-by: James Yang &lt;James.Yang@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
Show the DDR memory data rate in addition to the memory clock
frequency.  For DDR/DDR2 memories the memory data rate is 2x the
memory clock.

Signed-off-by: James Yang &lt;James.Yang@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>85xx: get_tbclk() speed up and rounding fix</title>
<updated>2008-03-26T16:43:04+00:00</updated>
<author>
<name>James Yang</name>
<email>James.Yang@freescale.com</email>
</author>
<published>2008-02-08T22:44:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=591933ca6eabc440e6ed6967233aaf56fce464a3'/>
<id>591933ca6eabc440e6ed6967233aaf56fce464a3</id>
<content type='text'>
Speed up get_tbclk() by referencing pre-computed bus clock
frequency value from global data instead of sys_info_t.  Fix
rounding of result to nearest; previously it was rounding
upwards.

Signed-off-by: James Yang &lt;James.Yang@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
Speed up get_tbclk() by referencing pre-computed bus clock
frequency value from global data instead of sys_info_t.  Fix
rounding of result to nearest; previously it was rounding
upwards.

Signed-off-by: James Yang &lt;James.Yang@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Update SVR numbers to expand support</title>
<updated>2008-03-26T16:43:04+00:00</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2008-02-06T07:19:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1ced121600b2060ab2ff9f0fddd9421fd70a0dc6'/>
<id>1ced121600b2060ab2ff9f0fddd9421fd70a0dc6</id>
<content type='text'>
FSL has taken to using SVR[16:23] as an SOC sub-version field.  This
is used to distinguish certain variants within an SOC family.  To
account for this, we add the SVR_SOC_VER() macro, and update the SVR_*
constants to reflect the larger value.  We also add SVR numbers for all
of the current variants.  Finally, to make things neater, rather than
use an enormous switch statement to print out the CPU type, we create
and array of SVR/name pairs (using a macro), and print out the CPU name
that matches the SVR SOC version.

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
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<pre>
FSL has taken to using SVR[16:23] as an SOC sub-version field.  This
is used to distinguish certain variants within an SOC family.  To
account for this, we add the SVR_SOC_VER() macro, and update the SVR_*
constants to reflect the larger value.  We also add SVR numbers for all
of the current variants.  Finally, to make things neater, rather than
use an enormous switch statement to print out the CPU type, we create
and array of SVR/name pairs (using a macro), and print out the CPU name
that matches the SVR SOC version.

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Handle Asynchronous DDR clock on 85xx</title>
<updated>2007-12-12T04:34:20+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2007-12-07T10:59:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d435793229ce29a42797c1edc39f5b34f987f91a'/>
<id>d435793229ce29a42797c1edc39f5b34f987f91a</id>
<content type='text'>
The MPC8572 introduces the concept of an asynchronous DDR clock with
regards to the platform clock.

Introduce get_ddr_freq() to report the DDR freq regardless of sync/async
mode.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
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<pre>
The MPC8572 introduces the concept of an asynchronous DDR clock with
regards to the platform clock.

Introduce get_ddr_freq() to report the DDR freq regardless of sync/async
mode.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Stop using immap_t on 85xx</title>
<updated>2007-12-12T04:34:20+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2007-11-29T08:10:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=04db400892da37b76a585e332a0c137954ad2015'/>
<id>04db400892da37b76a585e332a0c137954ad2015</id>
<content type='text'>
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &amp;immap.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &amp;immap.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Remove CONFIG_OF_FLAT_TREE related code from mpc85xx since we now use libfdt</title>
<updated>2007-12-12T04:34:20+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2007-11-29T07:23:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2714223f8e04ab3e4133ff65872eef366d90bfea'/>
<id>2714223f8e04ab3e4133ff65872eef366d90bfea</id>
<content type='text'>
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Setting MSR[DE] in do_reset</title>
<updated>2007-10-19T18:13:44+00:00</updated>
<author>
<name>urwithsughosh@gmail.com</name>
<email>urwithsughosh@gmail.com</email>
</author>
<published>2007-09-24T17:32:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=df90968b48fb34fa9072fab150db2ac89678f537'/>
<id>df90968b48fb34fa9072fab150db2ac89678f537</id>
<content type='text'>
Hello,
   This patch ensures the soft reset of the board for the 85xx boards
   by setting the MSR[DE] in the do_reset function.

Signed-off-by: Sughosh Ganu &lt;urwithsughosh@gmail.com&gt;
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<pre>
Hello,
   This patch ensures the soft reset of the board for the 85xx boards
   by setting the MSR[DE] in the do_reset function.

Signed-off-by: Sughosh Ganu &lt;urwithsughosh@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add support for UEC to 8568</title>
<updated>2007-08-14T06:47:44+00:00</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2007-08-14T05:14:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=da9d4610d76e52c4d20a8f3d8433439a7fcf5b71'/>
<id>da9d4610d76e52c4d20a8f3d8433439a7fcf5b71</id>
<content type='text'>
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
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<pre>
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx</title>
<updated>2007-05-16T22:07:21+00:00</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2007-05-16T21:52:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=255a3577c848706441daee0174543efe205a77f8'/>
<id>255a3577c848706441daee0174543efe205a77f8</id>
<content type='text'>
For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
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<pre>
For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
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