u-boot.git/cpu/mpc85xx/cpu_init.c, branch v1.3.4

85xx: Cleanup L2 cache size detection

2008-07-15T01:14:20+00:00

The L2 size detection code was a bit confusing and we kept having to add
code to it to handle new processors.  Change the sense of detection so we
look for the older processors that aren't changing.

Also added support for 1M cache size on 8572.

Signed-off-by: Kumar Gala

FSL LAW: Keep track of LAW allocations

2008-06-11T06:50:53+00:00

Make it so we keep track of which LAWs have allocated and provide
a function (set_next_law) which can allocate a LAW for us if one is
free.

In the future we will move to doing more "dynamic" LAW allocation
since the majority of users dont really care about what LAW number
they are at.

Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them

Signed-off-by: Kumar Gala 
Signed-off-by: Andy Fleming

MPC85xx: Beautify boot output of L2 cache configuration

2008-06-10T23:22:26+00:00

The boot output is now aligned poperly with other boot output
lines, e.g.:

  FLASH: 128 MB
  L2:    512 KB enabled

Signed-off-by: Wolfgang Grandegger

85xx: Use SVR_SOC_VER instead of SVR_VER

2008-04-11T22:32:51+00:00

The recent change introduced by 'Update SVR numbers to expand support'
now requires that we use SVR_SOC_VER instead of SVR_VER if we want
to compare against a particular processor id.

Signed-off-by: Kumar Gala

85xx: Added support for multicore boot mechanism

2008-03-26T16:43:03+00:00

Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.

Added support for using the ePAPR defined spin-table mechanism on 85xx.

Signed-off-by: Kumar Gala

85xx: Add the concept of CFG_CCSRBAR_PHYS

2008-03-26T16:43:03+00:00

When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.

For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR

Signed-off-by: Kumar Gala

85xx: Get ride of old TLB setup code

2008-01-17T08:19:18+00:00

Now that all boards have been converted, remove old config code and the
config option for the new style.

Signed-off-by: Kumar Gala

85xx: Reworked initial processor init

2008-01-17T08:04:53+00:00

Reworked the initial processor initialzation sequence:
* introduced cpu_early_init_f that is run in address space 1 (AS=1)
* Moved TLB/LAW and CCSR init into cpu_early_init_f()
* Reworked initial asm code to do most of the core init before TLBs

The main reasons for these changes are to allow handling of 36-bit phys
addresses in the future and some of the issues that will exist when we
do that.

There are a few caveats on what can be initialized via the LAW and TLB
static tables:
* TLB entry 14/15 can't be initialized via the TLB table
* any LAW that covers the implicit boot window (4G-8M to 4G) must map to
  the code that is currently executing.

Signed-off-by: Kumar Gala

85xx: Move LAW init code into C

2008-01-17T05:21:55+00:00

Move the initialization of the LAWs into C code and provide an API
to allow modification of LAWs after init.

Board code is responsible to provide a law_table and num_law_entries.

We should be able to use the same code on 86xx as well.

Signed-off-by: Kumar Gala

Stop using immap_t on 85xx

2007-12-12T04:34:20+00:00

In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.

Signed-off-by: Kumar Gala