u-boot.git/cpu/mpc85xx/cpu_init.c, branch v2009.06

85xx: Add support for additional e500mc features

2009-03-30T18:33:50+00:00

* Enable backside L2
* e500mc no longer has timebase enable in HID (moved to CCSR register)

Signed-off-by: Kumar Gala

85xx: init gd as early as possible

2008-12-04T09:15:43+00:00

Moved up the initialization of GD so C code like set_tlb() can use
gd->flags to determine if we've relocated or not in the future.

Signed-off-by: Kumar Gala 
Acked-by: Andy Fleming

85xx: Fix relocation of CCSRBAR

2008-12-04T09:15:43+00:00

If the virtual address for CCSRBAR is the same after relocation but
the physical address is changing we'd end up having two TLB entries with
the same VA.  Instead we new us the new CCSRBAR virt address + 4k as a
temp virt address to access the old CCSRBAR to relocate it.

Signed-off-by: Kumar Gala 
Acked-by: Andy Fleming

85xx: Add CPU 2 errata workaround to all 8548 boards

2008-12-04T04:46:42+00:00

All mpc8548-based boards should implement the suggested workaround
to CPU 2 errata. Without the workaround, its possible for the
8548's core to hang while executing a msync or mbar 0 instruction
and a snoopable transaction from an I/O master tagged to make
quick forward progress is present.

Signed-off-by: Peter Tyser 
Acked-by: Andy Fleming

rename CFG_ macros to CONFIG_SYS

2008-10-18T19:54:03+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

mpc85xx: Add support for the MPC8536

2008-08-27T16:43:54+00:00

The MPC8536 Adds SDHC and SATA controllers to the PQ3 family.  We
also have SERDES init code for the 8536.

Signed-off-by: Kumar Gala 
Signed-off-by: Srikanth Srinivasan 
Signed-off-by: Dejan Minic 
Signed-off-by: Jason Jin 
Signed-off-by: Dave Liu

85xx: Cleanup L2 cache size detection

2008-07-15T01:14:20+00:00

The L2 size detection code was a bit confusing and we kept having to add
code to it to handle new processors.  Change the sense of detection so we
look for the older processors that aren't changing.

Also added support for 1M cache size on 8572.

Signed-off-by: Kumar Gala

FSL LAW: Keep track of LAW allocations

2008-06-11T06:50:53+00:00

Make it so we keep track of which LAWs have allocated and provide
a function (set_next_law) which can allocate a LAW for us if one is
free.

In the future we will move to doing more "dynamic" LAW allocation
since the majority of users dont really care about what LAW number
they are at.

Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them

Signed-off-by: Kumar Gala 
Signed-off-by: Andy Fleming

MPC85xx: Beautify boot output of L2 cache configuration

2008-06-10T23:22:26+00:00

The boot output is now aligned poperly with other boot output
lines, e.g.:

  FLASH: 128 MB
  L2:    512 KB enabled

Signed-off-by: Wolfgang Grandegger

85xx: Use SVR_SOC_VER instead of SVR_VER

2008-04-11T22:32:51+00:00

The recent change introduced by 'Update SVR numbers to expand support'
now requires that we use SVR_SOC_VER instead of SVR_VER if we want
to compare against a particular processor id.

Signed-off-by: Kumar Gala