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<title>u-boot.git/cpu/mpc85xx, branch LABEL_2006_06_30_2020</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/cpu/mpc85xx?h=LABEL_2006_06_30_2020</id>
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<updated>2006-03-31T16:32:53Z</updated>
<entry>
<title>GCC-4.x fixes: clean up global data pointer initialization for all boards.</title>
<updated>2006-03-31T16:32:53Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2006-03-31T16:32:53Z</published>
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<id>urn:sha1:d87080b721e4f8dca977af7571c5338ae7bb8db7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Fix bug in [id]cache_status commands for MPC85xx processors;</title>
<updated>2006-03-12T23:46:05Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2006-03-12T23:46:05Z</published>
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<id>urn:sha1:b38dbd4622a2abeedf9fcb1806958d9afac0bbd4</id>
<content type='text'>
should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
</content>
</entry>
<entry>
<title>Fix DPRAM offset/size for MPC8541/8555.</title>
<updated>2005-12-06T14:02:31Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.(none)</email>
</author>
<published>2005-12-06T14:02:31Z</published>
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<id>urn:sha1:a889bd27ef2a9c01eb5b10d067765545781efa0a</id>
<content type='text'>
Simplify TQM85xx Makefile handling.
</content>
</entry>
<entry>
<title>Fix MPC85xx PCI support (pci_register_hose() before pci config access)</title>
<updated>2005-11-07T12:43:06Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2005-11-07T12:43:06Z</published>
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<id>urn:sha1:527b5a511c804074eebfc08c9ae7860b6717da85</id>
<content type='text'>
Patch by Stefan Roese, 07 Nov 2005
</content>
</entry>
<entry>
<title>Add support for multiple PHYs.</title>
<updated>2005-10-28T20:30:33Z</updated>
<author>
<name>Marian Balakowicz</name>
<email>m8@semihalf.com</email>
</author>
<published>2005-10-28T20:30:33Z</published>
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<id>urn:sha1:63ff004c4fcad9f690bf44dbd15d568bb47aac2d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Cleanup for GCC-4.x</title>
<updated>2005-10-13T14:45:02Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2005-10-13T14:45:02Z</published>
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<id>urn:sha1:77ddac9480d63a80b6bb76d7ee4dcc2d1070867e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Added support for KwikByte KB920x boards (based on AT91RM9200)</title>
<updated>2005-10-04T22:19:34Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2005-10-04T22:19:34Z</published>
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<id>urn:sha1:99b0d2851a137453f4aca5f0a3d301b776bda28b</id>
<content type='text'>
Patch by Matt ?? &lt;kb9200_dev@kwikbyte.com&gt;, 27 Apr 2005
</content>
</entry>
<entry>
<title>E500 update: repoint IVPR to RAM when code is relocated</title>
<updated>2005-10-04T22:00:54Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2005-10-04T22:00:54Z</published>
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<id>urn:sha1:7d314992a82cea41bb5de596421100ddce9d9c17</id>
<content type='text'>
Patch by Kylo Ginsberg, 13 Apr 2005
</content>
</entry>
<entry>
<title>Merge with /home/wd/git/u-boot/master</title>
<updated>2005-08-05T09:22:28Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2005-08-05T09:22:28Z</published>
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<id>urn:sha1:cbf9c117282b8729bdb86071997b58fcab58c444</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Fix typos in cpu/85xx/start.S which caused DataTLB exception to be</title>
<updated>2005-08-03T23:24:19Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2005-08-03T23:24:19Z</published>
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<id>urn:sha1:3e0bc4473add883fd68a49b7dab971191b943415</id>
<content type='text'>
routed to the Watchdog handler
Patch by Eugene Surovegin, 18 Jun 2005
</content>
</entry>
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