u-boot.git/cpu/mpc85xx, branch master Unnamed repository; edit this file 'description' to name the repository. ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU 2010-04-13T07:13:16+00:00 Peter Tyser ptyser@xes-inc.com 2010-04-13T03:28:09+00:00 8d1f268204b07e172f3cb5cee0a3974d605b0b98 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> 
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
85xx: Set HID1[mbdd] on e500v2 rev5.0 or greater 2010-04-07T05:21:27+00:00 Sandeep Gopalpet sandeep.kumar@freescale.com 2010-03-12T05:15:02+00:00 ff8473e90a018c2bb19a196176c1f2e9602d6354 The HID1[MBDD] bit is new on rev5.0 or greater cores and will optimize the performance of mbar/eieio instructions. Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com> 
The HID1[MBDD] bit is new on rev5.0 or greater cores and will optimize
the performance of mbar/eieio instructions.

Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
85xx: Added various P1012/P1013/P1021/P1022 defines 2010-04-07T05:21:22+00:00 Kumar Gala galak@kernel.crashing.org 2010-03-31T04:06:53+00:00 216082754f6da5359ea0db9b0cc03ad531ac6e45 There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added P1012/P1013/P1021/P1022 to cpu_type_list and SVR list * Added number of LAWs for P1012/P1013/P1021/P1022 * Set CONFIG_MAX_CPUS to 2 for P1021/P1022 * PCI port config Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
There are various locations that we have chip specific info:

* Makefile for which ddr code to build
* Added P1012/P1013/P1021/P1022 to cpu_type_list and SVR list
* Added number of LAWs for P1012/P1013/P1021/P1022
* Set CONFIG_MAX_CPUS to 2 for P1021/P1022
* PCI port config

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
85xx: Add defines for BUCSR bits to make code more readable 2010-04-07T05:08:17+00:00 Kumar Gala galak@kernel.crashing.org 2010-03-29T18:50:31+00:00 69bcf5bc80a47acbd62b8cfff932cb12d47997d7 Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
85xx: Fix enabling of L1 cache parity on secondary cores 2010-03-30T15:48:30+00:00 Kumar Gala galak@kernel.crashing.org 2010-03-26T20:14:43+00:00 33f57bd553edf29dffef5a6c7d76e169c79a6049 Use the same code between primary and secondary cores to init the L1 cache. We were not enabling cache parity on the secondary cores. Also, reworked the L1 cache init code to match the e500mc L2 init code that first invalidates the cache and locks. Than enables the cache and makes sure its enabled before continuing. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
Use the same code between primary and secondary cores to init the
L1 cache.  We were not enabling cache parity on the secondary cores.

Also, reworked the L1 cache init code to match the e500mc L2 init code
that first invalidates the cache and locks.  Than enables the cache and
makes sure its enabled before continuing.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
kgdb: cpu/mpc* cpu/74xx: include kgdb.h when needed 2010-02-08T21:05:42+00:00 Mike Frysinger vapier@gentoo.org 2010-02-08T20:30:16+00:00 e39bf1e2a9e437174687de687c127ec980a93eeb Commit cbb0cab1d929839d broke some platforms which used kgdb code but didn't actually include kgdb.h. So include kgdb.h in all the relevant traps code. Signed-off-by: Mike Frysinger <vapier@gentoo.org> 
Commit cbb0cab1d929839d broke some platforms which used kgdb code but
didn't actually include kgdb.h.  So include kgdb.h in all the relevant
traps code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
85xx: Add support for 'cpu disable' command 2010-01-27T05:17:50+00:00 Kumar Gala galak@kernel.crashing.org 2010-01-12T18:56:05+00:00 a9c3ac78d81d7ff4fe239e292e11e0f78ac5d461 Support disabling of a core via user command 'cpu disable'. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
Support disabling of a core via user command 'cpu disable'.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add support to disable cpu's in multicore processors 2010-01-27T05:17:49+00:00 Kumar Gala galak@kernel.crashing.org 2010-01-12T17:42:43+00:00 4194b3668a93eee18dd1f7eb1309ca7b05003aa7 Add a disable sub-command to the cpu command that allows for disabling cores in multicore processors. This can be useful for systems that are using multicore chips but aren't utilizing all the cores as a way to reduce power and possibly improve performance. Also updated an added missing copyright. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
Add a disable sub-command to the cpu command that allows for disabling
cores in multicore processors.  This can be useful for systems that are
using multicore chips but aren't utilizing all the cores as a way to
reduce power and possibly improve performance.

Also updated an added missing copyright.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2010-01-26T21:29:51+00:00 Wolfgang Denk wd@denx.de 2010-01-26T21:29:51+00:00 0a42c3a433e25dd30b5062aa251f5a240478cbbb 






ppc: remove -ffixed-r14 gcc option.
2010-01-26T18:30:16+00:00

Joakim Tjernlund
Joakim.Tjernlund@transmode.se

2010-01-19T13:41:57+00:00

a16e9a5b5f23106665dde15d974db17e8aeb83f1

This is no loger needed, free up r14 for general usage.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>





This is no loger needed, free up r14 for general usage.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>