<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/cpu/mpc85xx, branch v1.3.0-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/cpu/mpc85xx?h=v1.3.0-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/cpu/mpc85xx?h=v1.3.0-rc2'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2007-08-29T05:11:44Z</updated>
<entry>
<title>Enable L2 cache for MPC8568MDS board</title>
<updated>2007-08-29T05:11:44Z</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2007-08-23T19:20:54Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a1ac419fa0d2d23ddd08bd61d16896a9f33c933'/>
<id>urn:sha1:7a1ac419fa0d2d23ddd08bd61d16896a9f33c933</id>
<content type='text'>
The L2 cache size is 512KB for 8568, print out the correct informaiton.

Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
</content>
</entry>
<entry>
<title>85xxCDS: Add make targets for legacy systems.</title>
<updated>2007-08-14T06:51:39Z</updated>
<author>
<name>Randy Vinson</name>
<email>rvinson@linuxbox.(none)</email>
</author>
<published>2007-02-28T02:42:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7f3f2bd2dc08e0b05e185662ca2e2d283757104a'/>
<id>urn:sha1:7f3f2bd2dc08e0b05e185662ca2e2d283757104a</id>
<content type='text'>
The PCI ID select values on the Arcadia main board differ depending
on the version of the hardware. The standard configuration supports
Rev 3.1. The legacy target supports Rev 2.x.

Signed-off-by Randy Vinson &lt;rvinson@mvista.com&gt;
</content>
</entry>
<entry>
<title>Add support for UEC to 8568</title>
<updated>2007-08-14T06:47:44Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2007-08-14T05:14:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=da9d4610d76e52c4d20a8f3d8433439a7fcf5b71'/>
<id>urn:sha1:da9d4610d76e52c4d20a8f3d8433439a7fcf5b71</id>
<content type='text'>
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
</entry>
<entry>
<title>Empirically set cpo and clk_adjust for mpc85xx DDR2 support</title>
<updated>2007-08-14T06:45:51Z</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2007-06-19T18:18:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d111d6382c99fdea08c2312eeeae8786945e189a'/>
<id>urn:sha1:d111d6382c99fdea08c2312eeeae8786945e189a</id>
<content type='text'>
This patch is against u-boot-mpc85xx.git of www.denx.com

Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
both MPC8548CDS board and MPC8568MDS board, especially for supporting
533MHz DDR2.

Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
DDR2 on all current board versions especially ver 1.92 or later to bring
up.

Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
</content>
</entry>
<entry>
<title>Use an absolute address when jumping out of 4k boot page</title>
<updated>2007-08-14T06:45:09Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2007-08-07T23:07:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3db0bef59eab1155801618cef5c481e97553b597'/>
<id>urn:sha1:3db0bef59eab1155801618cef5c481e97553b597</id>
<content type='text'>
On e500 when we leave the 4k boot page we should use an absolute address since
we don't know where the board code may want us to be really running at.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>MPC85xx BA bits not set for 3-bit bank address DIMM</title>
<updated>2007-08-14T06:44:55Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2007-08-13T19:49:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=39980c610c9a4c381907c9e1d1b9c0e1c0dca57a'/>
<id>urn:sha1:39980c610c9a4c381907c9e1d1b9c0e1c0dca57a</id>
<content type='text'>
The current implementation does not set the number of bank address bits
(BA) in the processor. The default assumes 2 logical bank bits. This
works fine for a DIMM that uses devices with 4 internal banks (SPD
byte17 = 0x4) but needs to be set appropriately for a DIMM that uses
devices with 8 internal banks (SPD byte17 = 0x8).

Signed-off-by: Greg Davis &lt;DavisG@embeddedplanet.com&gt;
</content>
</entry>
<entry>
<title>Fix minor 85xx warnings</title>
<updated>2007-08-14T06:39:14Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2007-08-13T19:38:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6c543597bb4b1ecf5d8589f7abb0f39929fb7fd1'/>
<id>urn:sha1:6c543597bb4b1ecf5d8589f7abb0f39929fb7fd1</id>
<content type='text'>
Some patches had inserted warnings into the build:
* mpc8560ads declared data without using it
* cpu_init declared ecm and immap without using it in all CONFIGs
* MPC8548CDS.h had its default filenames changed so that they contained
  "\m" in the paths.  Made the defaults not Windows-specific (or
  anything-specific)

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
</entry>
<entry>
<title>85xx start.S cleanup and exception support</title>
<updated>2007-08-14T06:34:21Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2007-08-14T06:34:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=61a21e980a7b9188424d04f1c265fdc5c21c7e85'/>
<id>urn:sha1:61a21e980a7b9188424d04f1c265fdc5c21c7e85</id>
<content type='text'>
From: Ed Swarthout &lt;Ed.Swarthout@freescale.com&gt;

Support external interrupts from platform to eliminate system hangs.
Define CONFIG_INTERRUPTS board configure option to enable.
Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC.

Remove extra cpu initialization redundant with hardware initialization.
Whitespace cleanup.

Define and use _START_OFFSET consistent with other processors using
ppc_asm.tmpl

Move additional code from .text to boot page to make room for
exception vectors at start of image.

Handle Machine Check, External and Critical exceptions.

Fix e500 machine check error determination in traps.c

TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half.

Signed-off-by: Ed Swarthout &lt;Ed.Swarthout@freescale.com&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
</entry>
<entry>
<title>85xx allow debugger to configure ddr.</title>
<updated>2007-08-14T06:22:01Z</updated>
<author>
<name>Ed Swarthout</name>
<email>Ed.Swarthout@freescale.com</email>
</author>
<published>2007-07-27T06:50:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=40c7f9b0de4e300370adfc704128fa0f79a143b6'/>
<id>urn:sha1:40c7f9b0de4e300370adfc704128fa0f79a143b6</id>
<content type='text'>
Only check for mpc8548 rev 1 when compiled for 8548.

Signed-off-by: Ed Swarthout &lt;Ed.Swarthout@freescale.com&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
</entry>
<entry>
<title>mpc85xx L2 cache reporting and SRAM relocation option.</title>
<updated>2007-08-14T06:21:55Z</updated>
<author>
<name>Ed Swarthout</name>
<email>Ed.Swarthout@freescale.com</email>
</author>
<published>2007-07-27T06:50:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=29372ff38c5baab7d0e3a8c14fe11fa194a38704'/>
<id>urn:sha1:29372ff38c5baab7d0e3a8c14fe11fa194a38704</id>
<content type='text'>
Allow debugger to override flash cs0/cs1 settings to enable alternate
boot regions

Signed-off-by: Ed Swarthout &lt;Ed.Swarthout@freescale.com&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
</entry>
</feed>
