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<title>u-boot.git/cpu/mpc85xx, branch v2009.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Change DDR tlb start entry to CONFIG param for 85xx</title>
<updated>2009-01-13T22:47:07+00:00</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2009-01-13T21:29:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=950264317eb9594b2b5ee2fb65206200a1c6007a'/>
<id>950264317eb9594b2b5ee2fb65206200a1c6007a</id>
<content type='text'>
So that we can locate the DDR tlb start entry to the value other than 8. By
default, it is still 8.

Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
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<pre>
So that we can locate the DDR tlb start entry to the value other than 8. By
default, it is still 8.

Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>mpc8[56]xx: Put localbus clock in sysinfo and gd</title>
<updated>2008-12-20T00:32:49+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28'/>
<id>ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28</id>
<content type='text'>
Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
and print it out, but don't save it.

This changes where its calculated and stored to be more consistent with the
CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.

The localbus frequency is added to sysinfo and calculated when sysinfo is
set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.

get_clocks() copies the frequency into the global data, as the other
frequencies are, into a new field that is only enabled for MPC85xx and
MPC86xx.

checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
from sysinfo, like the other frequencies, instead of calculating it on the
spot.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
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<pre>
Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
and print it out, but don't save it.

This changes where its calculated and stored to be more consistent with the
CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.

The localbus frequency is added to sysinfo and calculated when sysinfo is
set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.

get_clocks() copies the frequency into the global data, as the other
frequencies are, into a new field that is only enabled for MPC85xx and
MPC86xx.

checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
from sysinfo, like the other frequencies, instead of calculating it on the
spot.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc8568: Double local bus clock divider</title>
<updated>2008-12-20T00:32:48+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=446c381e3e16f19857b72ea0d06241267b8b9d58'/>
<id>446c381e3e16f19857b72ea0d06241267b8b9d58</id>
<content type='text'>
The clock divider for the MPC8568 local bus should be doubled, like the
other newer MPC85xx chips.

Since there are now more chips with a 2x divider than a 1x, and any new
85xx chips will probably be 2x, invert the sense of the #if so that it
lists the 1x chips instead of the 2x ones.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
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<pre>
The clock divider for the MPC8568 local bus should be doubled, like the
other newer MPC85xx chips.

Since there are now more chips with a 2x divider than a 1x, and any new
85xx chips will probably be 2x, invert the sense of the #if so that it
lists the 1x chips instead of the 2x ones.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>85xx: Fix the boot window issue</title>
<updated>2008-12-20T00:32:48+00:00</updated>
<author>
<name>Dave Liu</name>
<email>daveliu@freescale.com</email>
</author>
<published>2008-12-16T04:09:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f51f07eb58fad12de9294ba4ee6c09a0ddeaee03'/>
<id>f51f07eb58fad12de9294ba4ee6c09a0ddeaee03</id>
<content type='text'>
If one custom board is using the 8MB flash, it is set
as FLASH_BASE = 0xef000000, TEXT_BASE = 0xef780000.
The current start.S code will be broken at switch_as.

It is because the TLB1[15] is set as 16MB page size,
EPN = TEXT_BASE &amp; 0xff000000, RPN = 0xff000000.

For the 8MB flash case, the EPN = 0xefxxxxxx,
RPN = 0xffxxxxxx. Assume the virt address of switch_as
is 0xef7ff18c, the real address of the instruction at
switch_as should be 0xff7ff18c. the 0xff7ff18c is out
of the range of the default 8MB boot LAW window
0xff800000 - 0xffffffff.

So when we switch to AS1 address space at switch_as,
the core can't fetch the instruction at switch_as any
more. It will cause broken issue.

Signed-off-by: Dave Liu &lt;daveliu@freescale.com&gt;
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<pre>
If one custom board is using the 8MB flash, it is set
as FLASH_BASE = 0xef000000, TEXT_BASE = 0xef780000.
The current start.S code will be broken at switch_as.

It is because the TLB1[15] is set as 16MB page size,
EPN = TEXT_BASE &amp; 0xff000000, RPN = 0xff000000.

For the 8MB flash case, the EPN = 0xefxxxxxx,
RPN = 0xffxxxxxx. Assume the virt address of switch_as
is 0xef7ff18c, the real address of the instruction at
switch_as should be 0xff7ff18c. the 0xff7ff18c is out
of the range of the default 8MB boot LAW window
0xff800000 - 0xffffffff.

So when we switch to AS1 address space at switch_as,
the core can't fetch the instruction at switch_as any
more. It will cause broken issue.

Signed-off-by: Dave Liu &lt;daveliu@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Set IVPR to kenrel entry point in second core boot page</title>
<updated>2008-12-20T00:32:41+00:00</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2008-12-03T15:08:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=181a3650113883728927928b3ac81ad6dade4b2c'/>
<id>181a3650113883728927928b3ac81ad6dade4b2c</id>
<content type='text'>
Assuming the OSes exception vectors start from the base of kernel address, and
the kernel physical starting address can be relocated to an non-zero address.
This patch enables the second core to have a valid IVPR for debugger before
kernel setting IVPR in CAMP mode. Otherwise, IVPR is 0x0 and it is not a valid
value for second core which runs kernel at different physical address other
than 0x0.

Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
</content>
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<pre>
Assuming the OSes exception vectors start from the base of kernel address, and
the kernel physical starting address can be relocated to an non-zero address.
This patch enables the second core to have a valid IVPR for debugger before
kernel setting IVPR in CAMP mode. Otherwise, IVPR is 0x0 and it is not a valid
value for second core which runs kernel at different physical address other
than 0x0.

Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc8xxx: LCRR[CLKDIV] is sometimes five bits</title>
<updated>2008-12-20T00:20:25+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a5d212a263c58cc746481bf1fc878510533ce7d6'/>
<id>a5d212a263c58cc746481bf1fc878510533ce7d6</id>
<content type='text'>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</content>
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<pre>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc8[56]xx: Put localbus clock in device tree</title>
<updated>2008-12-20T00:20:20+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=58ec4866ed916c7e422f5107bb27b0822084728e'/>
<id>58ec4866ed916c7e422f5107bb27b0822084728e</id>
<content type='text'>
Export the localbus frequency in the device tree, the same way the CPU, TB,
CCB, and various other frequencies are exported in their respective device
tree nodes.

Some localbus devices need this information to be programed correctly, so
it makes sense to export it along with the other frequencies.

Unfortunately, when someone wrote the localbus dts bindings, they didn't
bother to define what the "compatible" property should be.  So it seems no
one was quite sure what to put in their dts files.

Based on current existing dts files in the kernel source, I've used
"fsl,pq3-localbus" and "fsl,elbc" for MPC85xx, which are used by almost all
of the 85xx devices, and are looked for by the Linux code.  The eLBC is
apparently not entirely backward compatible with the pq3 LBC and so eLBC
equipped platforms like 8572 won't use pq3-localbus.

For MPC86xx, I've used "fsl,elbc" which is used by some of the 86xx systems
and is also looked for by the Linux code.  On MPC8641, I've also used
"fsl,mpc8641-localbus" as it is also commonly used in dts files, some of
which don't use "fsl,elbc" or any other acceptable name to match on.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</content>
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<pre>
Export the localbus frequency in the device tree, the same way the CPU, TB,
CCB, and various other frequencies are exported in their respective device
tree nodes.

Some localbus devices need this information to be programed correctly, so
it makes sense to export it along with the other frequencies.

Unfortunately, when someone wrote the localbus dts bindings, they didn't
bother to define what the "compatible" property should be.  So it seems no
one was quite sure what to put in their dts files.

Based on current existing dts files in the kernel source, I've used
"fsl,pq3-localbus" and "fsl,elbc" for MPC85xx, which are used by almost all
of the 85xx devices, and are looked for by the Linux code.  The eLBC is
apparently not entirely backward compatible with the pq3 LBC and so eLBC
equipped platforms like 8572 won't use pq3-localbus.

For MPC86xx, I've used "fsl,elbc" which is used by some of the 86xx systems
and is also looked for by the Linux code.  On MPC8641, I've also used
"fsl,mpc8641-localbus" as it is also commonly used in dts files, some of
which don't use "fsl,elbc" or any other acceptable name to match on.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>85xx: Add support to populate addr map based on TLB settings</title>
<updated>2008-12-20T00:20:08+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-12-16T20:59:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ecf5b98c7a6a2e2256dfddd48fab26678dcd6b90'/>
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<content type='text'>
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Update U-Boot's build timestamp on every compile</title>
<updated>2008-12-06T22:36:43+00:00</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2008-11-03T15:30:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=561858ee7d0274c3e89dc98d4d0698cb6fcf6fd9'/>
<id>561858ee7d0274c3e89dc98d4d0698cb6fcf6fd9</id>
<content type='text'>
Use the GNU 'date' command to auto-generate a new U-Boot
timestamp on every compile.

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
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<pre>
Use the GNU 'date' command to auto-generate a new U-Boot
timestamp on every compile.

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>85xx: init gd as early as possible</title>
<updated>2008-12-04T09:15:43+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-11-24T16:29:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9df59533f77de2829b4b66e5b7620e04edaa391c'/>
<id>9df59533f77de2829b4b66e5b7620e04edaa391c</id>
<content type='text'>
Moved up the initialization of GD so C code like set_tlb() can use
gd-&gt;flags to determine if we've relocated or not in the future.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
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<pre>
Moved up the initialization of GD so C code like set_tlb() can use
gd-&gt;flags to determine if we've relocated or not in the future.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
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