u-boot.git/cpu/mpc85xx, branch v2009.08

Prepare 2009.08-rc3

2009-08-22T21:27:26+00:00

Update CHANGELOG, minor Coding Style cleanup.

Signed-off-by: Wolfgang Denk

85xx: Fix addrmap to include memory

2009-08-14T22:42:05+00:00

When we init the addrmap based on the TLB we will not end up getting
the TLB that covers memory if we are using SPD.  The reason is we
haven't relocated at the point that we setup the memory TLB and thus it
will not get setup in the addrmap.

Instead we can just walk over the TLB array after we've relocated and
see all the TLBs that have been set and use that information to populate
the initial addrmap.  By doing this we insure that we get the TLB
entries that cover memory.

Signed-off-by: Kumar Gala

Update Freescale copyrights to remove "All Rights Reserved"

2009-07-29T07:59:22+00:00

"All Rights Reserved" conflicts with the GPL.

Signed-off-by: Kumar Gala

fsl_dma: Break out common memory initialization function

2009-07-02T04:12:01+00:00

Signed-off-by: Peter Tyser 
Signed-off-by: Kumar Gala

8xxx: Move dma_init() call to common code

2009-07-02T04:12:00+00:00

Signed-off-by: Peter Tyser 
Signed-off-by: Kumar Gala

fsl_dma: Move dma function prototypes to common header file

2009-07-02T04:11:52+00:00

Signed-off-by: Peter Tyser 
Signed-off-by: Kumar Gala

8xxx: Rename dma_xfer() to dmacpy()

2009-07-02T04:07:47+00:00

Also update dmacpy()'s argument order to match memcpy's and use
phys_addr_t/phy_size_t for address/size arguments

Signed-off-by: Peter Tyser 
Signed-off-by: Kumar Gala

8xxx: Break out DMA code to a common file

2009-07-02T04:01:51+00:00

DMA support is now enabled via the CONFIG_FSL_DMA define instead of the
previous CONFIG_DDR_ECC

Signed-off-by: Peter Tyser 
Signed-off-by: Kumar Gala

fsl/85xx, 86xx: Sync up DMA code

2009-06-12T22:17:58+00:00

The following changes were made to sync up the DMA code between the 85xx
and 86xx architectures which will make it easier to break out common
8xxx DMA code:

85xx:
- Don't set STRANSINT and SPCIORDER fields in SATR register.  These bits
  only have an affect when the SBPATMU bit is set.
- Write 0xffffffff instead of 0xfffffff to clear errors in the DMA
  status register.  We may as well clear all 32 bits of the register...

86xx:
- Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers
- Add clearing of errors in the DMA status register when initializing
  the controller
- Clear the channel start bit in the DMA mode register after a transfer

Signed-off-by: Peter Tyser 
Signed-off-by: Kumar Gala

fsl: Create common fsl_dma.h for 85xx and 86xx cpus

2009-06-12T22:17:45+00:00

Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to
reduce a large amount of code duplication

Signed-off-by: Peter Tyser 
Signed-off-by: Kumar Gala