FSL has taken to using SVR[16:23] as an SOC sub-version field.  This
is used to distinguish certain variants within an SOC family.  To
account for this, we add the SVR_SOC_VER() macro, and update the SVR_*
constants to reflect the larger value.  We also add SVR numbers for all
of the current variants.  Finally, to make things neater, rather than
use an enormous switch statement to print out the CPU type, we create
and array of SVR/name pairs (using a macro), and print out the CPU name
that matches the SVR SOC version.

Signed-off-by: Andy Fleming <afleming@freescale.com>

This is the proper fix for a missing closing brace in the function
ft_cpu_setup() noticed by joe.hamman <at> embeddedspecialties.com.
The ft_cpu_setup() function in mpc8641hpcn.c should have been
removed earlier as it was under the obsolete CONFIG_OF_FLAT_TREE,
but was missed.  Only, the sbc8641d was nominally still using it.
It all got ripped out, and the funcality that was in ft_board_setup()
was refactored to remove the CPU portions into the new file
cpu/mpc86xx/fdt.c instead.  Make sbc8641d use this now.

Based loosely on an original patch from joe.hamman@embeddedspecialties.com

Signed-off-by: Jon Loeliger <jdl@freescale.com>

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>

Signed-off-by: Jason Jin <Jason.jin@freescale.com>

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Mahesh Jade <mahesh.jade@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>

For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Some device trees have a mac-address property, some have local-mac-address,
and some have both.  To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>

Move the 8641HPCN's PIXIS code to the new directory
board/freescale/common/ as it will be shared by
future boards not in the same processor family.

Write a "pixis_reset" command that utilizes the FPGA
reset sequencer to support alternate soft-reset options
such as using the "alternate" flash bank, enabling
the watch dog, or choosing different CPU frequencies.

Add documentation for the pixis_reset to README.mpc8641hpcn.

Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>

Both 8641 and 8641D have SVR == 0x8090, and are distinguished
by the byte in bits 16-23 instead.
Thanks to Jason Jin for noticing.

Signed-off-by: Jon Loeliger <jdl@freescale.com>