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<title>u-boot.git/cpu/ppc4xx/cpu.c, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/cpu/ppc4xx/cpu.c?h=main</id>
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<updated>2010-04-13T07:13:16Z</updated>
<entry>
<title>ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU</title>
<updated>2010-04-13T07:13:16Z</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2010-04-13T03:28:09Z</published>
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<id>urn:sha1:8d1f268204b07e172f3cb5cee0a3974d605b0b98</id>
<content type='text'>
Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Fix reporting of bootstrap options G and F on 460EX/GT</title>
<updated>2010-01-21T07:18:30Z</updated>
<author>
<name>Felix Radensky</name>
<email>felix@embedded-sol.com</email>
</author>
<published>2010-01-19T15:37:13Z</published>
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<id>urn:sha1:d98964aaacc5c54cf7d67bb1e5128ed067086dd7</id>
<content type='text'>
Bootstrap options G and F are reported incorrectly (G instead
of F and vice versa). This patch fixes this.

Signed-off-by: Felix Radensky &lt;felix@embedded-sol.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Consolidate pci_pre_init() function</title>
<updated>2009-11-19T10:35:30Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-11-12T15:41:09Z</published>
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<id>urn:sha1:a760b0203155da6fb8b8e9086169bb87d09d76fa</id>
<content type='text'>
This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Print PCI synchronous clock frequency upon bootup</title>
<updated>2009-10-23T14:04:45Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-10-19T12:44:11Z</published>
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<id>urn:sha1:08c6a2628478ace808b3767db17e4148cac5a7fb</id>
<content type='text'>
Some 4xx variants (e.g. 440EP(x)/GR(x)) have an internal
synchronous PCI clock. Knowledge about the currently configured
value might be helpful. So let's print it out upon bootup.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Add PPC405EX(r) Rev D support</title>
<updated>2009-10-07T07:14:27Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-10-06T05:21:08Z</published>
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<id>urn:sha1:56f14818f66c68a8b9e45925f29ceb974405ad48</id>
<content type='text'>
Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older
405EX(r) parts. Here a list:

0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec
0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec

Since there are only a few older parts in the field, this patch now
changes the PVR's above to represent the new Rev D versions.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Phong Vo" &lt;pvo@amcc.com&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Big cleanup of PPC4xx defines</title>
<updated>2009-09-11T08:35:58Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-09-09T14:25:29Z</published>
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<id>urn:sha1:d1c3b27525b664e8c4db6bb173eed51bfc8220de</id>
<content type='text'>
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -&gt; PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -&gt; CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Add basic support for AMCC PPC460EX/460GT rev B chips</title>
<updated>2009-07-30T05:22:18Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-07-29T06:45:27Z</published>
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<id>urn:sha1:89bcc4875007ef6608297dc11e7a0d1fbd9900d2</id>
<content type='text'>
This patch is based on a diff created by Phong Vo from AMCC.

Signed-off-by: Phong Vo &lt;pvo@amcc.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Replace 4xx lowercase SPR references</title>
<updated>2009-07-24T04:47:17Z</updated>
<author>
<name>Matthias Fuchs</name>
<email>matthias.fuchs@esd.eu</email>
</author>
<published>2009-07-22T15:27:56Z</published>
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<id>urn:sha1:58ea142fb2e969f32306c8da1dabfaebd6fa141a</id>
<content type='text'>
Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Remove compilation warning "pci_async_enabled defined but not used"</title>
<updated>2009-07-08T08:59:07Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-07-06T09:44:33Z</published>
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<id>urn:sha1:20b3c4b528606d51799aed5e4c71783720cd2b72</id>
<content type='text'>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Remove PCI async bootup message if PCI is not used</title>
<updated>2009-06-12T18:39:52Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-05-27T08:34:32Z</published>
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<id>urn:sha1:1bbae2b816d4ed38db2ebf42166a973b1ffc0df7</id>
<content type='text'>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
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