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<title>u-boot.git/cpu/ppc4xx/cpu_init.c, branch LABEL_2006_06_30_2020</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/cpu/ppc4xx/cpu_init.c?h=LABEL_2006_06_30_2020</id>
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<updated>2006-06-02T14:20:36Z</updated>
<entry>
<title>Add support for PCS440EP board</title>
<updated>2006-06-02T14:20:36Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2006-06-02T14:18:04Z</published>
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<id>urn:sha1:a4c8d1389f96040bb6d482523de680ba1b9d7c9e</id>
<content type='text'>
Patch by Stefan Roese, 02 Jun 2006
</content>
</entry>
<entry>
<title>GCC-4.x fixes: clean up global data pointer initialization for all boards.</title>
<updated>2006-03-31T16:32:53Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@pollux.denx.de</email>
</author>
<published>2006-03-31T16:32:53Z</published>
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<id>urn:sha1:d87080b721e4f8dca977af7571c5338ae7bb8db7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merged 405gp_enet.c and 440gx_enet.c to generic 4xx_enet.c</title>
<updated>2005-08-16T16:18:00Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2005-08-16T16:18:00Z</published>
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<id>urn:sha1:d6c61aabc49c22a5c040f046fdc04dc478ed071f</id>
<content type='text'>
now handling all 4xx cpu's.
Patch by Stefan Roese, 16 Aug 2005
</content>
</entry>
<entry>
<title>Changed CONFIG_440_xx to CONFIG_440xx for a consistent design (405 and linux)</title>
<updated>2005-08-08T10:42:22Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2005-08-08T10:42:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=846b0dd2dca945c8bede8a34e2fa86e876715a06'/>
<id>urn:sha1:846b0dd2dca945c8bede8a34e2fa86e876715a06</id>
<content type='text'>
Patch by Stefan Roese, 08 Aug 2005
</content>
</entry>
<entry>
<title>Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.</title>
<updated>2005-08-01T14:41:48Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2005-08-01T14:41:48Z</published>
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<id>urn:sha1:c157d8e219694f5c3dea1ed3826668bdc67ca093</id>
<content type='text'>
Patch by Steven Blakeslee, 27 Jul 2005
</content>
</entry>
<entry>
<title>- Fix bug for initial stack in data cache as pointed out by Thomas Schaefer (tschaefer@giga-stream.de). Now inital stack in data cache can be used even if the chip select is in use.</title>
<updated>2003-06-05T15:35:20Z</updated>
<author>
<name>stroese</name>
<email>stroese</email>
</author>
<published>2003-06-05T15:35:20Z</published>
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<id>urn:sha1:37208785990729bec8756349109fa121ced40958</id>
<content type='text'>
</content>
</entry>
<entry>
<title>PPC405EP support added.</title>
<updated>2003-05-23T11:18:02Z</updated>
<author>
<name>stroese</name>
<email>stroese</email>
</author>
<published>2003-05-23T11:18:02Z</published>
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<id>urn:sha1:b867d705b6217fed505dd44cf539699b8a81733d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Changed PPC405GPr version from A to B.</title>
<updated>2003-04-04T16:00:33Z</updated>
<author>
<name>stroese</name>
<email>stroese</email>
</author>
<published>2003-04-04T16:00:33Z</published>
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<id>urn:sha1:baa3d528fe8f03c89bd9006819797db675632703</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Set edge conditioning circuitry on PPC405GPr for compatibility to existing PPC405GP designs.</title>
<updated>2003-03-20T15:21:50Z</updated>
<author>
<name>stroese</name>
<email>stroese</email>
</author>
<published>2003-03-20T15:21:50Z</published>
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<id>urn:sha1:38daa27d21c975c3285933e86c556d1dc69642f9</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Initial revision</title>
<updated>2002-08-27T09:48:53Z</updated>
<author>
<name>wdenk</name>
<email>wdenk</email>
</author>
<published>2002-08-27T09:48:53Z</published>
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