u-boot.git/cpu/ppc4xx/gpio.c, branch v2009.03

rename CFG_ macros to CONFIG_SYS

2008-10-18T19:54:03Z

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

ppc4xx: Fix problem in gpio_config()

2008-06-23T09:15:09Z

As pointed out by Guennadi Liakhovetski (thanks), pin2 is already shifted left by one. So the additional shift is bogus. Signed-off-by: Stefan Roese

ppc4xx: Add functionality to GPIO support

2008-01-04T10:38:45Z

This patch makes two additions to GPIO support: First, it adds function gpio_read_in_bit() to read the a bit from the GPIO Input Register (GPIOx_IR) in the same way that function gpio_read_out_bit() reads a bit from the GPIO Output Register (GPIOx_OR). Second, it modifies function gpio_set_chip_configuration() to provide an additional option for configuring the GPIO from the "CFG_4xx_GPIO_TABLE". According to the 440EPx User's Manual, when an alternate output is used, the three-state control is configured in one of two ways, depending on the particular output. The first option is to select the corresponding alternate three-state control in the GPIOx_TRSH/L registers. The second option is to select the GPIO Three-State Control Register (GPIOx_TCR) in the GPIOx_TRSH/L registers, and set the corresponding bit in the GPIOx_TCR register to enable the output. For example, the Manual specifies configuring the GPIO00 Alternate 1 Signal (PreAddr07) to use the alternate three-state control (first option), and specifies configuring the GPIO32 Alternate 1 Signal (USB2OM0) with the output enabled in the GPIOx_TCR register (second option). Currently, gpio_set_chip_configuration() configures all alternate signal outputs to use the first option. This patch allow the second option to be selected by setting the "out_val" element in the table entry to "GPIO_OUT_1". The first option is used when the "out_val" element is set to "GPIO_OUT_0". Because "out_val" is not currently used when an alternate signal is selected, and because all current GPIO tables set "out_val" to "GPIO_OUT_0" for all alternate signals, this patch should not change any existing configurations. Signed-off-by: Larry Johnson

ppc4xx: Correct GPIO offset in gpio_config()

2007-12-11T12:38:19Z

Thanks to Gary Jennejohn for pointing this out. Signed-off-by: Stefan Roese

ppc4xx: Enable 440 GPIO init table CFG_440_GPIO_TABLE for 405 platforms

2007-11-15T13:23:55Z

- Rename CFG_440_GPIO_TABLE to CFG_4xx_GPIO_TABLE - Cleanup of the 4xx GPIO functions - Move some GPIO defines from the cpu headers ppc405.h/ppc440.h into gpio.h Signed-off-by: Stefan Roese

ppc4xx: Add support for AMCC 405EP Taihu board

2007-07-26T15:49:11Z

Signed-off-by: John Otken

ppc4xx: Fix bug with default GPIO output value

2007-07-20T13:03:44Z

As spotted by Matthias Fuchs, the default output values for all GPIO1 outputs were not setup correctly. This patch fixes this issue. Signed-off-by: Stefan Roese

[ppc4xx] Extend 44x GPIO setup with default output state

2007-06-15T05:39:43Z

The board config array CFG_440_GPIO_TABLE for the ppc440 GPIO setup is extended with the default GPIO output state (level). Signed-off-by: Stefan Roese

[PATCH] fix gpio setting when using CFG_440_GPIO_TABLE

2007-06-08T07:55:24Z

Set the correct value in GPIOx_TCR when configuring the gpio with CFG_440_GPIO_TABLE. Signed-off-by: Benoit Monin Signed-off-by: Stefan Roese

[PATCH] Clean up 40EZ/Acadia support

2007-03-24T14:45:34Z

This patch cleans up all the open issue of the preliminary Acadia support. Signed-off-by: Stefan Roese