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<title>u-boot.git/cpu/ppc4xx/start.S, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU</title>
<updated>2010-04-13T07:13:16+00:00</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2010-04-13T03:28:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8d1f268204b07e172f3cb5cee0a3974d605b0b98'/>
<id>8d1f268204b07e172f3cb5cee0a3974d605b0b98</id>
<content type='text'>
Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
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<pre>
Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>ppc: Use r12 instead of r14 as GOT pointer.</title>
<updated>2010-01-26T18:30:13+00:00</updated>
<author>
<name>Joakim Tjernlund</name>
<email>Joakim.Tjernlund@transmode.se</email>
</author>
<published>2010-01-19T13:41:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0f8aa159175385ddd77bc91d11b9568583fbbd0c'/>
<id>0f8aa159175385ddd77bc91d11b9568583fbbd0c</id>
<content type='text'>
r14 is not supposed to be clobbered by functions. Switch
to r12 and call GET_GOT when needed. This will allow u-boot
to loose the -ffixed-r14 gcc option.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
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<pre>
r14 is not supposed to be clobbered by functions. Switch
to r12 and call GET_GOT when needed. This will allow u-boot
to loose the -ffixed-r14 gcc option.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc: Loose GOT access in IRQ</title>
<updated>2010-01-26T18:30:12+00:00</updated>
<author>
<name>Joakim Tjernlund</name>
<email>Joakim.Tjernlund@transmode.se</email>
</author>
<published>2010-01-19T13:41:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fc4e188789b01dc9f18c80869c43fdd7d1a51378'/>
<id>fc4e188789b01dc9f18c80869c43fdd7d1a51378</id>
<content type='text'>
Using the GOT in IRQ handlers requires r14 to be -ffixed-r14.
Avoid this by relocatate transfer_to_handler too.
This will allow to free up r14 later on.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
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<pre>
Using the GOT in IRQ handlers requires r14 to be -ffixed-r14.
Avoid this by relocatate transfer_to_handler too.
This will allow to free up r14 later on.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>relocation: Do not relocate NULL pointers.</title>
<updated>2009-10-08T07:33:36+00:00</updated>
<author>
<name>Joakim Tjernlund</name>
<email>Joakim.Tjernlund@transmode.se</email>
</author>
<published>2009-10-08T00:03:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=afc3ba0fc4195624e79e21244380ed7cc2fd6969'/>
<id>afc3ba0fc4195624e79e21244380ed7cc2fd6969</id>
<content type='text'>
NULL is an absolute value and should not be relocated.
After this correction code like:
 void weak_fun(void) __attribute__((weak));
 printf("weak_fun:%p\n", weak_fun);
will still print null after relocation.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
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<pre>
NULL is an absolute value and should not be relocated.
After this correction code like:
 void weak_fun(void) __attribute__((weak));
 printf("weak_fun:%p\n", weak_fun);
will still print null after relocation.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Big cleanup of PPC4xx defines</title>
<updated>2009-09-11T08:35:58+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-09-09T14:25:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d1c3b27525b664e8c4db6bb173eed51bfc8220de'/>
<id>d1c3b27525b664e8c4db6bb173eed51bfc8220de</id>
<content type='text'>
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -&gt; PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -&gt; CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -&gt; PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -&gt; CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Dual-license IBM code contributions</title>
<updated>2009-08-09T21:15:33+00:00</updated>
<author>
<name>Josh Boyer</name>
<email>jwboyer@linux.vnet.ibm.com</email>
</author>
<published>2009-08-07T17:53:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=317734966e763fdee183898c0ed940c9bada2541'/>
<id>317734966e763fdee183898c0ed940c9bada2541</id>
<content type='text'>
It was brought to our attention that U-Boot contains code derived from the
IBM OpenBIOS source code originally provided with some of the older PowerPC
4xx development boards.  As a result, the original license of this code has
been carried in the various files for a number of years in the U-Boot project.

IBM is dual-licensing the IBM code contributions already present in U-Boot
under either the terms of the GNU General Public License version 2, or the
original code license already present.

Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</content>
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<pre>
It was brought to our attention that U-Boot contains code derived from the
IBM OpenBIOS source code originally provided with some of the older PowerPC
4xx development boards.  As a result, the original license of this code has
been carried in the various files for a number of years in the U-Boot project.

IBM is dual-licensing the IBM code contributions already present in U-Boot
under either the terms of the GNU General Public License version 2, or the
original code license already present.

Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Replace 4xx lowercase SPR references</title>
<updated>2009-07-24T04:47:17+00:00</updated>
<author>
<name>Matthias Fuchs</name>
<email>matthias.fuchs@esd.eu</email>
</author>
<published>2009-07-22T15:27:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=58ea142fb2e969f32306c8da1dabfaebd6fa141a'/>
<id>58ea142fb2e969f32306c8da1dabfaebd6fa141a</id>
<content type='text'>
Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Fix TLB reset problem with recent 44x images</title>
<updated>2009-07-24T04:42:31+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-07-14T13:53:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0a371ca08908c9b2a58171223a79bffea1f7c6f5'/>
<id>0a371ca08908c9b2a58171223a79bffea1f7c6f5</id>
<content type='text'>
Patch d873133f [ppc4xx: Add Sequoia RAM-booting target] broke "normal"
booting on some 44x platforms. This breakage is only noticed in some
cases while powercycling. As it seems, the code in question in start.S
didn't invalidate TLB #0. This makes sense since this TLB is used for
the bootrom mapping. With the patch mentioned above even TLB #0 got
invalidated resulting in an error later on.

This patch now fixes this issue by only invalidating TLB #0 in the RAM-
booting case.

Tested succesfully on Sequoia and Canyonlands.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Dirk Eibach &lt;Eibach@gdsys.de&gt;
</content>
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<pre>
Patch d873133f [ppc4xx: Add Sequoia RAM-booting target] broke "normal"
booting on some 44x platforms. This breakage is only noticed in some
cases while powercycling. As it seems, the code in question in start.S
didn't invalidate TLB #0. This makes sense since this TLB is used for
the bootrom mapping. With the patch mentioned above even TLB #0 got
invalidated resulting in an error later on.

This patch now fixes this issue by only invalidating TLB #0 in the RAM-
booting case.

Tested succesfully on Sequoia and Canyonlands.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Dirk Eibach &lt;Eibach@gdsys.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Make pll_write global</title>
<updated>2009-07-08T08:59:07+00:00</updated>
<author>
<name>Matthias Fuchs</name>
<email>matthias.fuchs@esd.eu</email>
</author>
<published>2009-07-06T14:27:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0580e48f53f972783e56fcedadb9ce6e5b0b6f32'/>
<id>0580e48f53f972783e56fcedadb9ce6e5b0b6f32</id>
<content type='text'>
This patch makes pll_write on PPC405EP boards
global and callable from C code.

pll_write can be used to dynamically modify the PLB:PCI divider
as it is required for 33/66 MHz pci adapters based on the 405EP.

board_early_init_f() is a good place to do that (check M66EN signal
and call pll_write() when it is required).

Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
This patch makes pll_write on PPC405EP boards
global and callable from C code.

pll_write can be used to dynamically modify the PLB:PCI divider
as it is required for 33/66 MHz pci adapters based on the 405EP.

board_early_init_f() is a good place to do that (check M66EN signal
and call pll_write() when it is required).

Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Add Sequoia RAM-booting target</title>
<updated>2009-06-12T18:39:47+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-05-11T11:46:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d873133f2ba9bd613d5f6552c31cc70fb13f15d3'/>
<id>d873133f2ba9bd613d5f6552c31cc70fb13f15d3</id>
<content type='text'>
This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").

Here the commands to load and start this image from the BDI2000:

440EPX&gt;reset halt
440EPX&gt;load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX&gt;go 0x1000000

Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").

Here the commands to load and start this image from the BDI2000:

440EPX&gt;reset halt
440EPX&gt;load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX&gt;go 0x1000000

Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
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